BR-102024027197-A2 - DEVICE AND SYSTEM FOR DATA PROCESSING

Abstract

This application discloses a type of data processing device and system in the field of information technology. The data processing device provided by this application decouples the reception and execution of continuous write operations. The address cache module performs address reception and caching, the data cache module performs data reception and caching, and the address conversion module, the verification calculation module, the data inspection module, and the data splicing module perform write operations based on the cached data of the address cache module and the data cache module. Therefore, the execution of the write operation does not need to wait for the verification process of the original data, which reduces the execution time of the write operation to some extent and improves the efficiency of the write operation.

Inventors

• Jiang Zheng
• Xiaodong Sun
• Zhi Shen
• Zuonan XIAO
• Qihe KUANG

Assignees

• C*CORE TECHNOLOGY CO., LTD.

Dates

Publication Date

20260317

Application Date

20241225

Priority Date

20240905

Claims (10)

1. 1 - DEVICE AND SYSTEM FOR DATA PROCESSING, characterized by including: a. Address Cache Module: used to receive and cache the address of the write operation in the continuous write operation sent by the processor; b. Data Cache Module: used to receive and cache the data to be written corresponding to said continuous write operation; c. Address Conversion Module: used to read at least one write operation address from said address cache module, convert at least one said write operation address into a corresponding physical write address in memory, and read from said physical write address to obtain the first data and the first verification code corresponding to said first data; d. Verification Calculation Module: used to calculate to obtain the second verification code based on said first data read by said address conversion module; e. Data Inspection Module: used to modify the aforementioned first data to obtain new data based on the data to be written corresponding to at least one aforementioned write operation address after confirming that the aforementioned first verification code and the aforementioned second verification code are consistent and that the amount of data to be written corresponding to at least one aforementioned write operation address is less than the storage block size of the unit; and f. Data Amendment Module: used to amend the aforementioned new data and the new verification code calculated by the aforementioned verification calculation module according to the aforementioned new data, obtain amended data and write the aforementioned amended data to the aforementioned physical write address.
2. 2 - DEVICE AND SYSTEM FOR DATA PROCESSING, according to claim 1, characterized in that said address cache module is used to cache the write operation address in said continuous write operation according to the order of reception of said continuous write operation.
3. 3 - DEVICE AND SYSTEM FOR DATA PROCESSING, according to claim 1, characterized in that said data cache module is used to cache the data to be written corresponding to said continuous writing operation according to the order of reception of said continuous writing operation.
4. 4 - DEVICE AND SYSTEM FOR DATA PROCESSING, according to claim 1, characterized in that said verification calculation module is used to calculate to obtain the ECC verification code based on said first data read by said address conversion module, and uses said ECC verification code as said second verification code; correspondingly, said verification calculation module is used to use the ECC verification code calculated based on said new data as said new verification code.
5. 5 - DEVICE AND SYSTEM FOR DATA PROCESSING, according to claim 1, characterized in that said data inspection module is used to generate corresponding write error prompt information after confirming that said first verification code and said second verification code are inconsistent.
6. 6 - DEVICE AND SYSTEM FOR DATA PROCESSING, according to claim 1, characterized in that said data inspection module is used to use the data to be written corresponding to at least one said write operation address as said new data when it is confirmed that the amount of data to be written corresponding to at least one said write operation address is equal to the size of the unit's storage block.
7. 7 - DEVICE AND SYSTEM FOR DATA PROCESSING, according to any one of claims 1 to 6, characterized by: a. said address cache module is used to receive and cache the address of the read operation in the continuous read operation sent by said processor; b. said address conversion module is used to read at least one read operation address from said address cache module, convert at least one said read operation address into a corresponding physical read address in said memory, and read to obtain from said physical read address the third data and the third verification code corresponding to said third data; c. said verification calculation module is used to calculate to obtain the fourth verification code based on said third data; and d. said data inspection module is used to send said third data to said processor after confirming that said third verification code and said fourth verification code are consistent.
8. 8 - DEVICE AND SYSTEM FOR DATA PROCESSING, according to claim 7, characterized in that said data inspection module is used to generate corresponding read error prompt information after confirming that said third verification code and said fourth verification code are inconsistent.
9. 9 - DEVICE AND SYSTEM FOR DATA PROCESSING characterized by including the processor, memory and data processing device according to any of claims 1 to 8.
10. 10 - DEVICE AND SYSTEM FOR DATA PROCESSING, according to claim 9, characterized in that said memory and said data processing device communicate through the predefined interface module.

Description

Technological sector of invention [01] This application relates to the field of information technology and in particular to a type of data processing device and system. Known state of the art [02] Currently, when performing a write operation to memory, if the data to be written is smaller than the minimum recording unit size, it is necessary to read the old data first and then write the new data to be written to memory; in addition, the old data read needs to be checked before performing the write operation, which increases the execution time of the write operation and decreases the efficiency of the write operation. [03] Therefore, how to improve the efficiency of memory recording operation is a problem that technicians in this field need to solve. New features and objectives of the invention [04] In view of this, the objective of the present application is to provide a type of device and data processing system to improve the efficiency of memory recording operation. The specific plan is as follows: [05] In the first aspect, the present application offers a type of data processing device, including: a. the address cache module, which is used to receive and cache the write operation address in the continuous write operation sent by the processor; b. the data cache module, which is used to receive and cache the data to be written corresponding to said continuous write operation; c. the address conversion module, which is used to read at least one write operation address from said address cache module, convert at least one said write operation address into a corresponding physical write address in memory, and read from said physical write address to obtain the first data and the first check code corresponding to said first data; d. the check calculation module, which is used to calculate to obtain the second check code based on said first data read by said address conversion module; e. The data inspection module is used to modify the aforementioned first data to obtain new data based on the data to be written corresponding to at least one aforementioned write operation address, after confirming that the aforementioned first verification code and the aforementioned second verification code are consistent and that the amount of data to be written corresponding to at least one aforementioned write operation address is less than the storage block size of the unit; f. the data splicing module is used to splice the aforementioned new data and the new verification code calculated by the aforementioned verification calculation module according to the aforementioned new data, obtain spliced data, and write the aforementioned spliced data to the aforementioned physical write address. [06] Optionally, the aforementioned address cache module is used to cache the write operation address in the aforementioned continuous write operation according to the order of reception of the aforementioned continuous write operation. [07] Optionally, the aforementioned data cache module is used to cache the data to be written corresponding to the aforementioned continuous write operation according to the order of reception of the aforementioned continuous write operation. [08] Optionally, the aforementioned verification calculation module is used to calculate to obtain the ECC verification code based on the aforementioned first data read by the aforementioned address conversion module, and use the aforementioned ECC verification code as the aforementioned second verification code: a. correspondingly, the aforementioned verification calculation module is used to use the ECC verification code calculated based on the aforementioned new data as the aforementioned new verification code. [09] Optionally, the aforementioned data inspection module is used to generate corresponding write error prompt information after confirming that the aforementioned first verification code and the aforementioned second verification code are inconsistent. [010] Optionally, the aforementioned data inspection module is used to use the data to be written corresponding to at least one referred write operation address as the referred new data when it is confirmed that the amount of data to be written corresponding to at least one referred write operation address is equal to the storage block size of the unit. [011] Optionally, the aforementioned address cache module is used to receive and cache the address of the read operation in the continuous read operation sent by the aforementioned processor: b. the aforementioned address conversion module is used to read at least one read operation address from the aforementioned address cache module, convert at least one said read operation address into a corresponding physical read address in the aforementioned memory, and read to obtain from the said physical read address the third data and the third verification code corresponding to the said third data; c. the aforementioned verification calculation module is used to cal