BR-102024027198-A2 - A method for tracking instructions, devices, equipment, and computer-readable storage media.

BR102024027198A2BR 102024027198 A2BR102024027198 A2BR 102024027198A2BR-102024027198-A2

Abstract

This invention discloses a type of instruction tracing method, device, equipment, and medium, which relates to the field of instruction tracing, including: the instruction tracing controller in the microcontroller unit performs instruction tracing on each central processing unit (CPU) in the microcontroller unit, and obtains the program counter count value sent by the tracked CPU corresponding to the currently executed instructions; the currently executed instructions are the instructions currently executed by the tracked CPU; it determines whether the program counter count value is within the program counter count range corresponding to the tracked CPU; if so, it compresses the instruction tracing data corresponding to the currently executed instructions obtained after performing instruction tracing on the tracked CPU, and stores the compressed data in the on-chip memory in the microcontroller unit. This application can not only perform instruction tracing on multiple CPUs simultaneously, but also perform instruction tracing data storage within the specified range and improve on-chip memory resource utilization through data compression.

Inventors

Jiang Zheng
CHENJIE WU
Zhi Shen
Zuonan XIAO
Qihe KUANG

Assignees

C*CORE TECHNOLOGY CO., LTD.

Dates

Publication Date: 20260310
Application Date: 20241225
Priority Date: 20240823

Claims (10)

1. INSTRUCTION TRACKING METHOD, DEVICE, EQUIPMENT characterized by being applied to the instruction tracing controller in the microcontroller unit, including an on-chip memory and several central processors in said microcontroller unit; wherein said method includes: a. performing instruction tracing for each of said central processors, respectively, and obtaining the target program counter count value corresponding to the currently executed instructions sent by the traced central processor; b. determining whether said currently executed instructions are the instructions currently executed by said traced central processor; c. determining whether said target program counter count value is within the target program counter count range corresponding to said traced central processor; d. determining whether said target program counter count value is within said target program counter count range, compressing the instruction tracing data and storing the compressed data in said on-chip memory; e. To determine the aforementioned instruction trace data, these are the trace data corresponding to the instructions currently being executed, obtained after performing instruction tracing on the aforementioned tracked central processing unit.
2. INSTRUCTION TRACKING METHOD, DEVICE, EQUIPMENT according to claim 1, characterized in that said instruction tracking controller includes subcontrollers corresponding respectively to said various central processors, and said subcontroller is used to perform instruction tracking to said corresponding central processor.
3. INSTRUCTION TRACKING METHOD, DEVICE, EQUIPMENT according to claim 2, characterized in that before performing instruction tracing for each said central processor respectively, said also includes: a) obtaining the controller configuration instructions sent by the superior computer that communicates with said microcontroller unit and recording the information of each processor to be traced contained in said controller configuration instructions in each local register, respectively; b) obtaining, among them, each said processor information to be traced, including the identification of the processor to be traced and the counting range of the corresponding program counter; c) sending the start-up instructions to said corresponding central processor through the subcontroller respectively corresponding to the identification of each said processor to be traced to trigger said corresponding central processor to start working, and performs instruction tracing to said corresponding central processor.
4. INSTRUCTION TRACKING METHOD, DEVICE, EQUIPMENT according to claim 3, characterized in that said method determines whether said count value of the target program counter is within the count range of the target program counter corresponding to said tracked central processor, including: a) through the target subcontroller corresponding to the tracked central processor and based on the target register, determines whether said count value of the target program counter is within the count range of the target program counter corresponding to said tracked central processor; b) said target register being the register corresponding to the target subcontroller, and said count range of said target program counter being stored in said target register.
5. INSTRUCTION TRACKING METHOD, DEVICE, EQUIPMENT according to claim 4, characterized in that after determining whether the said count value of the target program counter is within the count range of the target program counter corresponding to the said tracked central processor, the said also includes: a) if the said target subcontroller determines that the count value of the said target program counter reaches the upper limit of the count range of the said target program counter, or the storage space corresponding to the tracked central processor in the on-chip memory is full, then it sends the stop-operation instruction to the said tracked central processor to trigger the said tracked central processor to stop operation, and terminate the instruction tracking of the said tracked central processor.
6. INSTRUCTION TRACKING METHOD, DEVICE, EQUIPMENT according to any one of claims 1 to 5, characterized by including: a) upon obtaining the data read instructions sent by the superior computer that performs data communication with said microcontroller unit, calling the storage controller to control said on-chip memory to send the target compressed data corresponding to the stored data read instructions so that the data decompression module decompresses the target compressed data and sends the decompressed data to the superior computer; b) the storage controller and the data decompression module are both located in said microcontroller unit.
7. INSTRUCTION TRACKING METHOD, DEVICE, EQUIPMENT according to claim 6, characterized in that said instruction tracking data is compressed, and the compressed data is stored in said on-chip memory, including: a) calling the data compression module to compress said instruction tracking data, and storing said compressed data through said storage controller in the storage space corresponding to said central processing unit tracked in said on-chip memory; b) said data compression module being located in said microcontroller unit.
8. INSTRUCTION TRACKING METHOD, DEVICE, EQUIPMENT characterized by being applied to the instruction tracing controller in the microcontroller unit, and including an on-chip memory and several central processors in said microcontroller unit, wherein said device includes: a) the instruction tracing module, to be used to perform instruction tracing for each of said central processors, respectively, and to obtain the count value of the target program counter corresponding to the currently executed instructions sent by the tracked central processor; b) said currently executed instructions are the instructions currently executed by said tracked central processor; c) the count value judgment module, to be used to determine whether said count value of the target program counter is within the count range of the target program counter corresponding to said tracked central processor; d) the data compression and storage module, to be used so that if the aforementioned value of the target program counter is within the aforementioned target program counter count range, it compresses the instruction trace data and stores the compressed data in the aforementioned on-chip memory; and e) the aforementioned instruction trace data is the trace data corresponding to the currently executed instructions, obtained after performing instruction tracing on the aforementioned tracked central processor.
9. INSTRUCTION TRACKING METHOD, DEVICE, EQUIPMENT characterized by including memory, used to save computer programs; the processor, used to execute the computer program to implement the instruction tracking method according to any of claims 1 to 7.
10. COMPUTER-READABLE STORAGE MEDIUM, characterized in that it is used to save a computer program, and when said computer program is executed by a processor, implements the instruction tracking method according to any one of claims 1 to 7.

Description

TECHNICAL FIELD 001. The present invention relates to the field of instruction tracking and, in particular, to a type of computer-readable instruction tracking method, device, equipment and medium. FUNDAMENTALS 002. Instruction tracing technology is an advanced CPU (Central Processing Unit, central processor) debugging technology. Compared to traditional single-step debugging, breakpoints, etc., instruction tracing technology can record the CPU's operating status over a period of time without stopping, record the instructions being executed over a period of time, program register addresses, operation results, and information such as whether interrupts and exceptions occur during CPU operation. By analyzing these records, program designers can quickly find problems and discover bottlenecks in application performance to optimize the design. 003. Current instruction tracking technology typically performs instruction tracking for a single CPU on the chip, and instruction tracking technology requires the design of a larger on-chip memory within the chip to store instruction tracking data; however, as the number of CPU cores increases, the required storage space will become increasingly larger, causing the problem of insufficient on-chip memory. SUMMARY OF THE INVENTION 004. In view of this, the objective of the present invention is to provide a type of instruction tracing method, device, equipment and medium, which can not only perform instruction tracing on multiple central processing units simultaneously, but also perform instruction tracing data storage within the specified range and improve the utilization of on-chip memory resources through data compression. The specific plan is as follows: 005. In the first aspect, the present application provides a type of instruction tracing method, applied to the instruction tracing controller in the microcontroller unit, and includes an on-chip memory and several central processors in said microcontroller unit; wherein said method includes: 006. Performs instruction tracing for each of the aforementioned central processors, respectively, and obtains the counter value of the target program corresponding to the currently executed instructions sent by the traced central processor; the aforementioned currently executed instructions are the instructions currently executed by the aforementioned traced central processor; 007. Determines whether the aforementioned counter value of the target program is within the counter range of the target program corresponding to the aforementioned tracked central processor; 008. If the aforementioned value of the target program counter count is within the aforementioned target program counter count range, compress the instruction trace data and store the compressed data in the aforementioned on-chip memory; the aforementioned instruction trace data is the trace data corresponding to the currently executed instructions, obtained after performing the instruction trace to the aforementioned tracked central processor. 009. Optionally, said instruction tracking controller includes subcontrollers corresponding respectively to said various central processors, and said subcontroller is used to perform instruction tracking to said corresponding central processor. 010. Optionally, before performing instruction tracing for each aforementioned central processor, the aforementioned also includes: 011. Obtains the controller configuration instructions sent by the superior computer that communicates with said microcontroller unit and records the information of each processor to be tracked contained in said controller configuration instructions in each local register, respectively; among them, each said processor information to be tracked includes the identification of the processor to be tracked and the counting range of the corresponding program counter; 012. Sends the start-up instructions to the corresponding central processor via the subcontroller corresponding to the identification of each processor to be tracked, in order to trigger the corresponding central processor to begin working, and performs the instruction tracking to the corresponding central processor. 013. Optionally, the aforementioned determines whether the aforementioned target program counter count value is within the target program counter count range corresponding to the aforementioned tracked central processor, including: 014. Through the target subcontroller corresponding to the tracked central processor and based on the target register, determine if the aforementioned count value of the target program counter is within the count range of the target program counter corresponding to the aforementioned tracked central processor; 015. Wherein, the aforementioned target register is the register corresponding to the target subcontroller, and the counting range of the aforementioned target program counter is stored in the aforementioned target register. 016. Optionally, after determinin