BR-102025010379-A2 - Spinlock acquisition method, spinlock acquisition device, electronic device and computer-readable storage medium.

BR102025010379A2BR 102025010379 A2BR102025010379 A2BR 102025010379A2BR-102025010379-A2

Abstract

The spinlock acquisition method and apparatus, device, and medium are provided. The method is applied to the predefined data write controller and includes: acquiring a read/write control request sent by any host via the AHB, the read/write control request including the original access request issued by the host and the expansion signal issued by a conditional write register; if the expansion signal meets the first predefined condition, sending a read request to the spinlock address in static random access memory to allow the memory to return the first read value; if the first read value meets the second predefined condition, sending a write request to the memory to write the host-matched target lock value to the spinlock address; and sending a read request to the spinlock address to allow the memory to return the second read value, and if the second read value is consistent with the target lock value, the host obtains the spinlock; otherwise, the host does not obtain the spinlock.

Inventors

Jiangwei YUAN
Qihe KUANG
Zongbao Wang
Jiang Zheng
Zuonan XIAO

Assignees

C*CORE TECHNOLOGY CO.,LTD

Dates

Publication Date: 20260317
Application Date: 20250523
Priority Date: 20240806

Claims (10)

1. SPINLOCK ACQUISITION METHOD, applied to a predefined data write controller, the data write controller being connected to an Advanced High-Performance Bus (AHB) and a static random access memory serving as a slave, the AHB being connected to a plurality of hosts, wherein the method is characterized by: acquiring a read and write control request sent by any host of the plurality of hosts through the AHB, the read and write control request comprising an original access request issued by any host and an expansion signal issued by a conditional write register on any host; parsing the read and write control request to obtain the expansion signal and, in the case where the expansion signal meets a first predefined condition, sending a read request to an address of a spinlock in the static random access memory to allow the static random access memory to return a first read value; in the case where the first read value meets a second predefined condition, sending a request Write to static random access memory to write a target lock value corresponding to any host at the spinlock address; and send a read request to the spinlock address to allow static random access memory to return a second read value and, if the second read value is consistent with the target lock value, determine which host has obtained the spinlock and, otherwise, determine which host has not obtained the spinlock.
2. A SPINLOCK ACQUISITION METHOD, according to claim 1, wherein the expansion signal is characterized by: a conditional write-permission signal and an expected value to indicate that the spinlock is in an unlocked state, and the conditional write-permission signal is a first predefined value or a second predefined value; correspondingly, in the case where the expansion signal meets the first predefined condition, sending the read request to the spinlock address in static random access memory comprises: in the case where the conditional write-permission signal is the first predefined value, sending the read request to the spinlock address in static random access memory; correspondingly, in the case where the first value read meets the second predefined condition, sending the write request to static random access memory comprises: in the case where the first value read is consistent with the expected value, sending the write request to static random access memory.
3. SPINLOCK ACQUISITION METHOD, according to claim 2, after analyzing the read and write control request to obtain the expansion signal, characterized by: if the conditional write permission signal is the second predefined value, directly sending the original access request to the static random access memory to perform read and write operations on the static random access memory.
4. A SPINLOCK ACQUISITION METHOD, according to claim 2, characterized in that in the case where the conditional write permission signal is the first predefined value, sending the read request to the spinlock address in static random access memory comprises: in the case where the conditional write permission signal is the first predefined value, pulling down a ready slave signal on a bus output signal sent locally to the AHB to protect read and write control requests sent by other hosts; and sending the read request to the spinlock address in static random access memory by a local conditional write execution state machine; correspondingly, after the case where the first value read is consistent with the expected value, sending the write request to static random access memory, the method further comprises: releasing the ready slave signal on the bus output signal, to receive read and write control requests sent by other hosts.
5. SPINLOCK ACQUISITION METHOD, according to claim 1, characterized in that the original access request comprises original write data and other bus output data, correspondingly, the method further comprises: expanding a bit width of the original write data in advance by any host to obtain an expanded bit width to allow the conditional write record to write expansion information, which is stored locally, in the expanded bit width to obtain expanded write data comprising the original write data and the expansion information; and merging the bus output data and the expanded write data by any host to obtain the read and write control request and sending the read and write control request by any host to the AHB.
6. SPINLOCK ACQUISITION METHOD, according to claim 5, characterized in that a first time period in which the conditional recording register emits the expansion signal is the same as a second time period in which the host emits the original recording data, and any host sends the expansion signal and the original recording data together to the AHB; correspondingly, after the host sends the expansion signal and the original recording data together to the AHB, the method further comprises: clearing the expansion information stored locally by the conditional recording register.
7. A METHOD FOR ACQUIRING A SPINLOCK, according to any one of claims 1 to 6, characterized in that, after determining that any host has not obtained the spinlock, the method further comprises: sending a target signal to any host to cause any host to resend the read and write control request, so that any host resends the read and write control request via the AHB, and then proceeding to the step of parsing the read and write control request to obtain the spinlock signal until it is determined that any host has obtained the spinlock.
8. SPINLOCK ACQUISITION APPARATUS, applied to a predefined data write controller, the data write controller being connected to an advanced high-performance bus (AHB) and a static random access memory serving as a slave, the AHB being connected to a plurality of hosts, wherein the apparatus is characterized by: a request acquisition module (11), configured to acquire a read and write control request sent by any host of the plurality of hosts through the AHB, the read and write control request comprising an original access request issued by any host and an expansion signal issued by a conditional write register on any host; a first read module (12), configured to: parse the read and write control request to obtain the expansion signal and, in the case where the expansion signal meets a predefined first condition, send a read request to an address of a spinlock in the static random access memory to allow the static random access memory to return a first read value; a module a write module (13), configured to, in the case where the first read value meets a second predefined condition, send a write request to the static random access memory to write a destination lock value corresponding to any host at the spinlock address; and a second read module (14), configured to: send a read request to the spinlock address to allow the static random access memory to return a second read value and, in the case where the second read value is consistent with the destination lock value, determine which host has obtained the spinlock and, otherwise, determine which host has not obtained the spinlock.
9. ELECTRONIC DEVICE (20), characterized by: a memory (22), configured to store a computer program (222); and a processor (21), configured to execute the computer program (222) to perform the steps of the spinlock acquisition method according to any one of claims 1 to 7.
10. COMPUTER-READABLE STORAGE MEDIUM, characterized by: storing a computer program (222), wherein the computer program, when executed by a processor (21), causes the processor (21) to execute the steps of the spinlock acquisition method according to any one of claims 1 to 7.

Description

CROSS-REFERENCE TO RELATIVE APPLICATION [0001] This application claims priority over Chinese Patent Application No. 202411071277.3, filed with the CNIPA on August 6, 2024, entitled “SPINLOCK ACQUISITION METHOD AND APPARATUS, DEVICE AND MEANS”, the full content of which is incorporated by reference herein. FIELD OF THE INVENTION [0002] The present invention relates to the field of digital integrated circuit design and computing technologies and, in particular, to a spinlock acquisition method, a spinlock acquisition apparatus, a device and a means. FUNDAMENTALS OF THE INVENTION [0003] Spinlock is a synchronization mechanism to protect shared resources against conflicts resulting from simultaneous access by multiple processors. When a thread attempts to acquire a spinlock but fails, the thread enters a busy-wait state and constantly checks whether the spinlock has been released, and this constant checking and waiting action is called a spin. [0004] To implement the spinlock mechanism between threads or processes, reservation instructions are introduced into a PowerPC instruction set (which is a central processing unit of a reduced instruction set architecture) and mainly include two types of commands: LWARX and STWCX. LWARX is a load and reservation instruction, where a specified address is declared in a reserved state while it is being accessed for reading due to the LWARX instruction. STWCX is a conditional write instruction, where determination can be performed on the reserved state of the address before the write operation of the STWCX instruction. The write operation is executed if the reserved state is the last reserved state declared by the kernel, and otherwise the write operation of the STWCX instruction is abandoned. To implement the above operation of declaring an address as reserved, a corresponding protocol and an additional bus are introduced in a Processor Local Bus (PLB) for support. [0005] However, this approach can only achieve spinlock acquisition between PowerPC cores, while a heterogeneous host cannot acquire the spinlock with this approach. Furthermore, the above approach requires PLB support, resulting in a complex design and low compatibility. Currently, Advanced High-Performance Buses (AHBs) are used in most traditional Microcontroller Units (MCUs), but AHBs do not support the reserve state. Additionally, the PowerPC processor is required to support LWARX and STWCX instructions, leading to a complex design. [0006] In summary, how to provide a solution that supports the AHB architecture and with which all heterogeneous hosts in the AHB can obtain the spinlock is a problem to be solved at the moment. DESCRIPTION OF THE INVENTION [0007] In view of the foregoing, the present invention aims to provide a spinlock acquisition method, a spinlock acquisition apparatus, a device and a means, so as to provide a solution that supports the AHB architecture and with which all heterogeneous hosts in an AHB can obtain a spinlock. The solution is specifically described as follows. [0008] In a first aspect, the present application provides a spinlock acquisition method, which is applied to a predefined data write controller, the data write controller being connected to an AHB and a static random access memory serving as a slave, the AHB being connected to multiple hosts; where the method includes: acquiring a read and write control request sent by any host from multiple hosts via the AHB, the read and write control request including an original access request issued by any host and an expansion signal issued by a conditional write register on any host; parsing the read and write control request to obtain the expansion signal and, in the case where the expansion signal meets a first predefined condition, sending a read request to an address of a spinlock in static random access memory to allow the static random access memory to return a first read value; in the case where the first read value meets a second predefined condition, sending a write request to the static random access memory to write a target lock value corresponding to any host at the spinlock address; Send a read request to the spinlock address to allow the static random access memory to return a second read value and, if the second read value is consistent with the target lock value, determine which host has obtained the spinlock and, otherwise, determine which host has not obtained the spinlock. [0009] Optionally, the expansion signal includes: a conditional write-permission signal and an expected value to indicate that the spinlock is in the unlocked state, and the conditional write-permission signal is either a first predefined value or a second predefined value; correspondingly, in the case where the expansion signal meets the first predefined condition, sending the read request to the spinlock address in static random access memory includes: in the case where the conditional write-permission signal is the first predefined value, send