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CA-3126692-C - COMMUNICATING PRINT COMPONENT

CA3126692CCA 3126692 CCA3126692 CCA 3126692CCA-3126692-C

Abstract

An integrated circuit to drive a number of fluid actuation devices, comprising a circuit configured to have a memory access state which can be set to one of an enabled state and disabled state. The integrated circuit to include a fluid actuation circuit to transmit selection information for a fluid actuation device, the selection information comprising a data state bit. The integrated circuit to include a memory cell array, configured so that each memory cell is accessible by the memory access state being enabled, and the data state bit being set.

Inventors

  • Scott A. Linn
  • James Michael Gardner
  • Michael W. Cumbie

Assignees

  • HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Dates

Publication Date
20260505
Application Date
20190206

Claims (20)

  1. What is claimed is: 1. A fluid ejection device comprising: a plurality of fluid actuation devices; and an integrated circuit comprising: a circuit configured to have a memory access state which can be set to one of an enabled state and disabled state; a fluid actuation circuit to transmit selection information for a fluid actuation device, the selection information to control a dispersion of fluid through the plurality offluid actuation devices and comprising a data state bit; and a memory cell array, configured so that each memory cell is accessible by the memory access state being enabled, and the data state bit being set.
  2. 2. The fluid ejection device of claim 1, wherein: the circuit comprises a configuration access state which can be set to one of an enabled state and disabled state, and each memory cell is made accessible by the memory access state being enabled, the configuration access state being enabled, and the fluid actuation circuit transmitting selection information comprising the data state bit being set.
  3. 3. The fluid ejection device of claim 1 or 2, wherein the selection information further comprises a configuration state bit, the integrated circuit to enable a configuration circuit in response to the configuration state bit being set.
  4. 4. The fluid ejection device of any one of claims 1 to 3, wherein the selection information further comprises a memory state bit, and a memory circuit to enable the memory access state in response to the memory state bit being set.
  5. 5. The fluid ejection device of claim 3 or 4, wherein the configuration circuit is configured to enable and disable the configuration access state.
  6. 6. The fluid ejection device of claim 5, wherein the configuration circuit enables and disables the configuration access state in response to the configuration state bit. Date Re9ue/Date Received 2023-12-04
  7. 7. The fluid ejection device of any one of claims 1 to 3, comprising a memory circuit configured to enable the memory access state.
  8. 8. The fluid ejection device of claim 8, wherein the memory circuit enables the memory access state in response to a memory state bit.
  9. 9. The fluid ejection device of any one of claims 1 to 8, configured so that each memory cell is accessible only for a duration of a FIRE signal.
  10. 10. The fluid ejection device of claim 9, configured so that a falling edge of the FIRE signal sets the memory access state to a disabled state.
  11. 11. The fluid ejection device of claim 9, configured so that a falling edge of the FIRE signal sets the memory access state to a disabled state and the configuration access state to a disabled state.
  12. 12. The fluid ejection device of claim 4, wherein the memory state bit, the configuration state bit, and the data state bit are to be received over a same interface pad.
  13. 13. The fluid ejection device of claim 4 or 12, wherein a clock signal in the circuit triggers the memory configuration bit to enable the memory access state and the configuration state bit to enable the configuration access state.
  14. 14. A method for driving a plurality of fluid actuation devices in a fluid actuation device comprising: configuring an integrated circuit to have a memory access state which can be set to one of an enabled state and disabled state; transmitting, with a fluid actuation circuit, selection information for a fluid actuation device of the plurality offluid actuation devices, the selection information to control a dispersion of fluid through the fluid actuation devices and comprising a data state bit; and Date Re9ue/Date Received 2023-12-04 configuring a memory cell array so that each memory cell is accessible by the memory access state being enabled, and the data state bit being set.
  15. 15. The method of claim 14, wherein configuring the memory cell array so that the memory cell is accessible by the memory access state being enabled comprises a configuration access state being enabled in addition to the data state bit and the memory access state both also being enabled.
  16. 16. The method of claims 14 or 15, wherein a memory circuit enables or disables the memory access state in response to a memory state bit.
  17. 17. The method of claim 15 or 16, wherein a configuration circuit enables or disables the configuration access state in response to a configuration state bit.
  18. 18. The method of any one of claims 14 to 17, wherein each memory cell is accessed for a duration of a FIRE signal.
  19. 19. The method of claim 18, wherein a falling edge of the FIRE signal sets the memory access state to a disabled state and the configuration access state to a disabled state.
  20. 20. The method of claim 15, wherein the memory state bit, the configuration state bit, and data state bit are to be received over the same interface pad.

Description

COMMUNICATING PRINT COMPONENT FIELD [0001] The subject disclosure relates to a communicating print component. BACKGROUND [0001a] Printers and printer cartridges can use a number of technologies to convey ink to a medium. The ink may be applied to a medium using a device affected by temperature differences across the device. Print quality can be determined in part by the outcome of a print job matching the input the printer is instructed to print. SUMMARY [0001b] Accordingly, in one aspect there is provided a fluid ejection device comprising: a plurality of fluid actuation devices; and an integrated circuit comprising: a circuit configured to have a memory access state which can be set to one of an enabled state and disabled state; a fluid actuation circuit to transmit selection information for a fluid actuation device, the selection information to control a dispersion offluid through the plurality of fluid actuation devices and comprising a data state bit; and a memory cell array, configured so that each memory cell is accessible by the memory access state being enabled, and the data state bit being set. [0001c] According to another aspect there is provided a method for driving a plurality of fluid actuation devices in a fluid actuation device comprising: configuring an integrated circuit to have a memory access state which can be set to one of an enabled state and disabled state; transmitting, with a fluid actuation circuit, selection information for a fluid actuation device of the plurality of fluid actuation devices, the selection information to control a dispersion of fluid through the fluid actuation devices and comprising a data state bit; and configuring a memory cell array so that each memory cell is accessible by the memory access state being enabled, and the data state bit being set. Date Re<;ue/Date Received 2023-02-16 -1a- [0001d] According to another aspect there is provided a removable printing component to drive a plurality of fluid actuation devices, comprising: an integrated circuit configured to have a memory access state which can be set to one of an enabled state and disabled state; a fluid actuation circuit to transmit selection information for a fluid actuation device, the selection information to control a dispersion offluid through the plurality of fluid actuation devices and comprising a data state bit; and a memory cell array, configured so that each memory cell is accessible by the memory access state being enabled, and the data state bit being set. [0001e] According to another aspect there is provided a fluid ejection device comprising: a plurality of fluid actuation devices; and an integrated circuit comprising: a circuit configured to have a memory access state which can be set to one of an enabled state and disabled state, the circuit comprising a storage element having a memory access bit that when set configures the memory access state of the circuit to the enabled state; a fluid actuation circuit to transmit selection information for a fluid actuation device of the plurality of fluid actuation devices, the selection information to control a dispersion of fluid through the fluid actuation device and comprising a data state bit; a memory cell array, configured so that a memory cell in the memory cell array is accessible by the memory access state being set to the enabled state, and the data state bit being set; and an analog bus having a single lane to simultaneously read a plurality of memory bits of the memory cell array over a same interface pad. Date Re<;ue/Date Received 2023-02-16 -1b- [0001f] According to another aspect there is provided a method for driving a plurality of fluid actuation devices in a fluid ejection device, comprising: configuring an integrated circuit in the fluid ejection device to have a memory access state which can be set to one of an enabled state and disabled state, the integrated circuit comprising a storage element having a memory access bit that when set configures the memory access state of the integrated circuit to the enabled state; transmitting, with a fluid actuation circuit, selection information for a fluid actuation device of the plurality of fluid actuation devices, the selection information to control a dispersion of fluid through the fluid actuation device and comprising a data state bit; configuring a memory cell array so that a memory cell in the memory cell array is accessible by the memory access state being set to the enabled state, and the data state bit being set; and reading a plurality of memory bits of the memory cell array simultaneously over a same interface pad. [0001g] According to another aspect there is provided a fluid ejection device comprising: a plurality of fluid actuation devices; and an integrated circuit comprising: a memory circuit configured to have a memory access state which can be set to one of an enabled state and disabled state, the memory circuit comprising a storage element having a memory access bit