Search

CA-3181128-C - SINGLE CARRIER PULSE WIDTH MODULATOR FOR 5-LEVEL CONVERTER WITH CAPACITOR VOLTAGE SELF-BALANCING, EQUAL LOSS DISTRIBUTION, AND IMPROVED OUTPUT VOLTAGE SPECTRUM

CA3181128CCA 3181128 CCA3181128 CCA 3181128CCA-3181128-C

Abstract

The present disclosure provides a method and apparatus using a novel PWM switching technique that requires only one PWM carrier signal and benefits from two logic functions to provide switching signals and provides the flying capacitor (FC) voltage as well as de-link capacitors voltages regulated to their desired values without external control. It may also, eliminate the odd multiples of the switching harmonic clusters from the output voltage is possible; double the frequency of first switching harmonic; reduce filtering efforts may be required since the values of the output LC filter inductor and capacitor can be very much reduced. Furthermore, notable reduction in control complexity is possible using the novel PWM method.

Inventors

  • Mostafa ABARZADEH
  • Kamal Al-Haddad

Assignees

  • SOCOVAR, SOCIETE EN COMMANDITE

Dates

Publication Date
20260505
Application Date
20200612

Claims (16)

  1. WO 2021/248223 PCT /CA2020/050818 What is claimed is: 1. A multi-level power inverter having a DC input and at least one AC phase output comprising for each one of said at least one AC phase output: two DC capacitors connected in series with said DC input, said DC capacitors, in operation, being charged to one half of a voltage of said DC input; a ground or neutral terminal connected to a midpoint between said two DC capacitors connected in series; a pair of power switches S3 connected in series across a first one of said two DC capacitors; a pair of power switches S4 connected in series across a second one of said two DC capacitors; a flying capacitor, in operation, being charged to one quarter of a voltage of said DC input; a pair of power switches S2, a first one of said power switches S2 connected between a midpoint between said power switches S3 and a first terminal of said flying capacitor and a second one of said power switches S2 connected between a midpoint between said power switches S4 and a second terminal of said flying capacitor; a pair of power switches S1, a first one of said power switches S1 connected between the first terminal of said flying capacitor and one of said at least one AC phase output, and a second one of said power switches S1 connected between the second terminal of said flying capacitor and said one of said at least one AC phase output; and 36 CA 03181128 2022- 12- l WO 2021/248223 PCT /CA2020/050818 a modulator having an input for receiving a reference waveform signal and gate signal outputs connected to each of said pairs of power switches S1 through S4, wherein said modulator, in operation, produces said gate signal outputs without sensor feedback, cause the flying capacitor to be equally charged and discharged in each pulse-width modulation period for voltage balancing of the flying capacitor, and causes the switching time of said pairs of power switches S3 and S4 to be equal to balance the voltages on said two DC capacitors while canceling odd multiples of a switching harmonic cluster frequency and doubling the switching harmonic cluster frequency.
  2. 2. The multi-level power inverter as defined in Claim 1, wherein said modulator comprises: at least one zero-crossing detector; two logic function circuits; and a single carrier signal source.
  3. 3. The multi-level power inverter as defined in Claim 1, wherein said modulator comprises a processor and memory storing instructions that when executed by the processor generate a sequence of said gate signal outputs in accordance with said reference waveform signal.
  4. 4. The multi-level power inverter as defined in Claim 3, wherein said modulator input comprises waveform characteristic data of said reference waveform signal. 37 CA 03181128 2022-12-1 WO 2021/248223 PCT /CA2020/050818
  5. 5. The multi-level power inverter as defined in any one of Claims 1 to 4, wherein said at least one AC phase output comprises three AC phase outputs, said reference waveform signal comprising three reference waveform signals having phases separated by 120 degrees and a common frequency and amplitude.
  6. 6. The multi-level power inverter as defined in any one of Claims 1 to 5, further comprising an LC filter connected to said one of said at least one AC phase output.
  7. 7. A multi-level power rectifier having a DC output and at least one AC phase input comprising: two DC capacitors connected in series with said DC output, said DC capacitors, in operation, being charged to one half of a voltage of said DC output; for each one of said at least one AC phase input: a ground or neutral terminal connected to a midpoint between said two DC capacitors connected in series; a pair of power switches S3 connected in series across a first one of said two DC capacitors; a pair of power switches S4 connected in series across a second one of said two DC capacitors; a flying capacitor, in operation, being charged to one quarter of a voltage of said DC output; 38 CA 03181128 2022- 12- l WO 2021/248223 PCT /CA2020/050818 a pair of power switches S2, a first one of said power switches S2 connected between a midpoint between said power switches S3 and a first terminal of said flying capacitor and a second one of said power switches S2 connected between a midpoint between said power switches S4 and a second terminal of said flying capacitor; a pair of power switches S1, a first one of said power switches S1 connected between the first terminal of said flying capacitor and one of said at least one AC phase input, and a second one of said power switches S1 connected between the second terminal of said flying capacitor and said one of said at least one AC phase input; and a current controller receiving phase and current measurements from said at least one AC phase input, a desired DC voltage signal and producing at least one reference waveform signal for each of said at least one AC phase input; a modulator having an input for receiving said at least one reference waveform signal for each of said at least one AC phase input and having gate signal outputs connected to each of said pairs of power switches S1 through S4, wherein said modulator, in operation, produces said gate signal outputs without sensor feedback, cause the flying capacitor to be equally charged and discharged in each pulse-width modulation period for voltage balancing of the flying capacitor, and causes the switching time of said pairs of power switches S3 and S4 to be equal to balance the voltages on said two DC capacitors while canceling odd multiples of a switching harmonic cluster frequency and doubling the switching harmonic cluster frequency. 39 CA 03181128 2022- 12- l WO 2021/248223 PCT /CA2020/050818
  8. 8. The multi-level power rectifier as defined in Claim 7, wherein said modulator comprises: at least one zero-crossing detector; two logic function circuits; and a single carrier signal source.
  9. 9. The multi-level power rectifier as defined in Claim 7, wherein said modulator comprises a processor and memory storing instructions that when executed by the processor generate a sequence of said gate signal outputs in accordance with said at least one reference waveform signal.
  10. 10. The multi-level power rectifier as defined in Claim 9, wherein said modulator input comprises waveform characteristic data of at least one said reference waveform signal.
  11. 11. The multi-level power rectifier as defined in any one of Claims 7 to 10, wherein said at least one AC phase input comprises three AC phase inputs, said reference waveform signal comprising three reference waveform signals having phases separated by 120 degrees and a common frequency and amplitude.
  12. 12. The multi-level power rectifier as defined in any one of Claims 7 to 11, further comprising grid filter connected to said one of said at least one AC phase input. CA 03181128 2022- 12- l WO 2021/248223 PCT /CA2020/050818
  13. 13. The multi-level power rectifier as defined in Claim 12, wherein said grid filter comprises an inductance and a resistance for each one of said at least one AC phase input.
  14. 14. A motor controller comprising: a rectifier for converting AC power to DC power; a multi-level power inverter as defined in any one of Claims 1 to 6 connected to said rectifier; and a controller connected to a motor sensor and to said input of said modulator input for providing said a reference waveform signal.
  15. 15. A motor controller comprising: a multi-level rectifier for converting AC power to DC power as defined in any one of Claims 7 to 13; a power inverter connected to said rectifier and having a pulse width modulator; and a controller connected to a motor sensor and to said input of said modulator input for providing a reference waveform signal.
  16. 16. A motor controller comprising: a multi-level rectifier for converting AC power to DC power as defined in any one of Claims 7 to 13; 41 CA 03181128 2022- 12- l WO 2021/248223 PCT /CA2020/050818 a multi-level power inverter as defined in any one of Claims 1 to 6 connected to said rectifier; and a controller connected to a motor sensor and to said input of said modulator input for providing said a reference waveform signal. 42 CA 03181128 2022- 12- l

Description

SINGLE CARRIER PULSE WIDTH MODULATOR FOR 5-LEVEL CONVERTER WITH CAPACITOR VOLTAGE SELF-BALANCING, EQUAL LOSS DISTRIBUTION, AND IMPROVED OUTPUT VOLTAGE SPECTRUM Technical Field 5 [001] The present relates to the field of electrical converters. More specifically this disclosure relates to the field of power converters using electronic switches. Background [002] This section is intended to provide a background or context to the invention that is recited in the claims. The description herein may include concepts that could be pursued, 10 but are not necessarily ones that have been previously conceived or pursued. Therefore, unless otherwise indicated herein, what is described in this section is not prior art to the description and claims in this application and is not admitted to be prior art by inclusion in this section. [003] Adjustable speed drives (ASD) are used to control the speed of electric motor 15 machinery. Many industrial processes such as assembly lines must operate at different speeds for different products. Where process conditions demand adjustment of flow from a pump or fan, varying the speed of the drive may save energy compared with other techniques for flow control. [004] In recent years, multi-level converters (MLC) are widely applied to various 20 applications such as Adjustable Speed Drive (ASD) due to its modularity and higher 1 CA 03181128 2022- 12- l WO 2021/248223 PCT /CA2020/050818 reliability. However, the major drawbacks of the MLC-based ASD are complicated control and modulation system, requiring closed loop controller to balance the capacitors voltages of the MLC, higher voltage ripple of the capacitors at low speeds, and non-equal loss distribution among power devices. 5 [005] As power electronic converters' state-of-the-art technology has advanced in recent years, MLCs are becoming more widely employed in various industrial applications, as described in references [1-4] (whose bibliographic data is presented at the end of the present description) and in ASDs. Neutral-point-clamped (NPC) and Active Neutral-pointclamped (ANPC), cascaded H-bridge (CHB), flying capacitor (FC), as well as modular 10 multilevel (MMC) converters are some major types among various presented MLCs in the literature [1-5]. The five-level ANPC converter, which is formed by combination of one 3L ANPC leg and one FC cell, and its hybrid sub-topologies are widely used in various industrial applications such as medium voltage industrial drives, static ground power units (GPU) for aircraft, and renewable energy conversion systems [6-13]. 15 [006] The ANPC topology and its generalized configuration have been presented and described in [14] and [15]. Fig. 1A, illustrates an example of a SL-AN PC converter with a hybrid configuration which comprises one 3L ANPC leg and one FC cell working in an inverter mode. Various modulation methods have been presented in the literature for the SL ANPC converter to provide improved output voltage Total harmonic distortion (THO) 20 as well as the de capacitors and FC voltage balancing. In [8], a modulation method has been proposed to balance the de capacitors and FC voltages of the single-phase SL 2 CA 03181128 2022- 12- l WO 2021/248223 PCT /CA2020/050818 ANPC converter for PV applications. Even though the proposed method can operate at unbalanced condition, it needs to measure de capacitors and FC voltages as well as output current. Hence, it requires four sensors to control the SL ANPC converter. The simple modulator using nearest voltage level technique has been presented in [16] to 5 balance de capacitors voltages, as well as FC voltage to their desired values. However, it also requires voltage sensors to measure and closed-loop control of the de capacitors voltages as well as FC voltage. Model predictive pulse pattern control methods (MP3C) have been proposed and applied to ABB ACS2000 general-propose drive in [17] and [18]. An improved finite control set model predictive control (FCS-MPC) method using pseudo 10 functions has been suggested to the 5L ANPC converter in [19]. The de capacitor and FC voltages are balanced to their desired values and common-mode voltage (CMV) is minimized by employing the suggested improved FCS-MPC. Moreover, by employing the defined pseudo-functions, only measuring the FC and neutral point voltages are required. However, the switching frequency of 5L ANPC is variable by employing aforementioned 15 modulation techniques. [007] Furthermore, ASOs Systems exploit pulse-width modulation (PWM) methods to provide improved output voltage waveform with THO. However, rated voltage of motor cannot be achieved by applying the sinusoidal PWM (SPWM) method in linear modulation region. Hence, to generate rated voltage at the output of ASO system, the SPWM method 20 should operate in non-linear region also named as over-modulation region which leads to higher THO and distorted output voltage waveform. 3 CA 03181128 2022- 12- l WO 2021/248223 PCT /CA2020/0508