CN-111010171-B - PLL circuit

CN111010171BCN 111010171 BCN111010171 BCN 111010171BCN-111010171-B

Abstract

The invention provides a PLL circuit. A PLL circuit (1) is provided with a phase comparator (10), a charge pump (20), a loop filter (30), a voltage-controlled oscillator (40), a frequency divider (50), a frequency difference determination unit (60), and a FV characteristic adjustment unit (70). A frequency difference determination unit (60) determines whether or not the frequency difference between the feedback oscillation signal and the input signal is equal to or less than a threshold value. A FV characteristic adjustment unit (70) selects a frequency band of the voltage controlled oscillator (40) to adjust FV characteristics.

Inventors

FUJITA YUSUKE
GENDAI YUJI

Assignees

哉英电子股份有限公司

Dates

Publication Date: 20260505
Application Date: 20190926
Priority Date: 20181004

Claims (6)

1. A PLL circuit, comprising: A voltage controlled oscillator including an inductor and a capacitor, which output an oscillation signal having a frequency corresponding to an input control voltage value by using a resonance phenomenon caused by the inductor and the capacitor, and which makes FV characteristics between the frequency and the control voltage value variable by selecting an arbitrary frequency band among a plurality of frequency bands; A phase comparator to which an oscillation signal output from the voltage controlled oscillator or a signal obtained by dividing the oscillation signal is input as a feedback oscillation signal, and to which an input signal is also input, a phase difference between the feedback oscillation signals and the input signal is detected, and a phase difference signal indicating the phase difference is output; a charge pump to which a phase difference signal output from the phase comparator is input and which outputs a charge-discharge current corresponding to a phase difference indicated by the phase difference signal; A loop filter to which a charge/discharge current outputted from the charge pump is inputted and which outputs the control voltage value which increases or decreases according to the charge/discharge amount of the charge/discharge current to the voltage controlled oscillator; a frequency difference determination unit to which the feedback oscillation signal and the input signal are input, and which determines whether or not a frequency difference between the feedback oscillation signal and the input signal is equal to or less than a threshold value; And a FV characteristic adjustment unit configured to adjust the FV characteristic by selecting a frequency band of the voltage controlled oscillator based on a boundary between a frequency band determined by the frequency difference determination unit to be equal to or less than the threshold value, and a frequency band determined by the frequency difference determination unit to be equal to or more than the threshold value, among the plurality of frequency bands settable in the voltage controlled oscillator.
2. The PLL circuit of claim 1, wherein, The FV characteristic adjustment unit selects an arbitrary frequency band from the plurality of frequency bands based on both the boundary on the high frequency side and the boundary on the low frequency side, and adjusts the FV characteristic.
3. The PLL circuit of claim 1, wherein, The FV characteristic adjustment unit selects any one of the plurality of frequency bands based on either one of the boundary on the high frequency side and the boundary on the low frequency side, and adjusts the FV characteristic.
4. A PLL circuit, comprising: A voltage controlled oscillator including a ring oscillator configured by connecting a plurality of delay elements having delays set according to an input control voltage value in a ring shape, outputting an oscillation signal having a frequency corresponding to the input control voltage value by using an oscillation phenomenon of the ring oscillator, and changing FV characteristics between the frequency and the control voltage value by selecting an arbitrary frequency band among a plurality of frequency bands; A phase comparator to which an oscillation signal output from the voltage controlled oscillator or a signal obtained by dividing the oscillation signal is input as a feedback oscillation signal, and to which an input signal is also input, a phase difference between the feedback oscillation signals and the input signal is detected, and a phase difference signal indicating the phase difference is output; a charge pump to which a phase difference signal output from the phase comparator is input and which outputs a charge-discharge current corresponding to a phase difference indicated by the phase difference signal; A loop filter to which a charge/discharge current outputted from the charge pump is inputted and which outputs the control voltage value which increases or decreases according to the charge/discharge amount of the charge/discharge current to the voltage controlled oscillator; a frequency difference determination unit to which the feedback oscillation signal and the input signal are input, and which determines whether or not a frequency difference between the feedback oscillation signal and the input signal is equal to or less than a threshold value; And a FV characteristic adjustment unit configured to adjust the FV characteristic by selecting a frequency band of the voltage controlled oscillator based on a boundary between a frequency band determined by the frequency difference determination unit to be equal to or less than the threshold value, and a frequency band determined by the frequency difference determination unit to be equal to or more than the threshold value, among the plurality of frequency bands settable in the voltage controlled oscillator.
5. The PLL circuit of claim 4, wherein, The FV characteristic adjustment unit selects an arbitrary frequency band from the plurality of frequency bands based on both the boundary on the high frequency side and the boundary on the low frequency side, and adjusts the FV characteristic.
6. The PLL circuit of claim 4, wherein, The FV characteristic adjustment unit selects any one of the plurality of frequency bands based on either one of the boundary on the high frequency side and the boundary on the low frequency side, and adjusts the FV characteristic.

Description

PLL circuit Technical Field The present invention relates to PLL circuits. Background In general, a PLL (Phase Locked Loop: phase locked Loop) circuit has a phase comparator, a charge pump, a Loop filter (Loop filter), and a voltage controlled oscillator (Voltage Controlled Oscillator, hereinafter referred to as "VCO") which form a Loop. The PLL circuit functions as a frequency synthesizer that outputs an oscillation signal having a frequency that is a constant multiple of the frequency of an input oscillation signal. The PLL circuit can restore a clock embedded in a digital signal input to a CDR (Clock Data Recovery: clock data restoring unit) device. The PLL circuit operates as follows. When a control voltage value is input to the voltage controlled oscillator, an oscillation signal having a frequency corresponding to the control voltage value is output from the voltage controlled oscillator. An oscillation signal output from the voltage controlled oscillator or a signal obtained by dividing the oscillation signal is input as a feedback oscillation signal to the phase comparator. In addition to the feedback oscillation signal, other input signals (oscillation signal or digital signal) are also input to the phase comparator. A phase difference between an input signal and a feedback oscillation signal is detected in a phase comparator, and a phase difference signal indicating the detected phase difference is output to a charge pump. A charge pump to which the phase difference signal is input outputs a charge/discharge current corresponding to the phase difference indicated by the phase difference signal. The charge-discharge current is input to a loop filter. The loop filter includes a capacitor element whose charge accumulation amount increases and decreases according to a charge/discharge current output from the charge pump. The loop filter outputs a control voltage value corresponding to the charge accumulation amount to the voltage controlled oscillator. When the control voltage value output from the loop filter is input to the voltage controlled oscillator, an oscillation signal having a frequency corresponding to the control voltage value is output from the voltage controlled oscillator. In a PLL circuit having such a loop, a control voltage value outputted from a loop filter and inputted to a voltage controlled oscillator converges to a certain value, so that a phase difference detected by a phase comparator becomes small. Then, an oscillation signal having a frequency obtained by multiplying the frequency of the input oscillation signal by a constant value is output from the voltage controlled oscillator, or a clock embedded in the input digital signal is recovered and then output. As the voltage controlled oscillator, there are various types of oscillators. Wherein the LC-VCO includes an inductor and a capacitor, and outputs an oscillation signal having a frequency corresponding to an input control voltage value through resonance phenomena of the inductor and the capacitor. The LC-VCO has less jitter when compared to other types of voltage controlled oscillators. Therefore, in the case of frequencies above 10Gbps, the use of LC-VCO is suitable in having various types of voltage controlled oscillators. In the LC-VCO, the frequency of the output oscillation signal changes little with respect to the change in the control voltage value when compared with other types of voltage controlled oscillators. In the LC-VCO, when the capacitance value of the capacitor is changed, FV characteristics between the frequency (F) of the output oscillation signal and the control voltage value (V) can be changed. Further, the range of the control voltage value input into the LC-VCO is limited, and when the control voltage value deviates from the range, the proportional relationship of the frequencies between the input and output is not established. However, the frequency of the transmitted signal may vary with time due to Spread Spectrum (hereinafter referred to as SS). When the frequency of a signal is constant, energy of electromagnetic waves emitted from the signal is concentrated at the frequency, and thus electromagnetic interference (Electro MAGNETIC INTERFERENCE, hereinafter referred to as EMI) becomes a problem. In contrast, if the frequency of a signal is intentionally modulated by an SS, the frequency band of the energy of electromagnetic waves emitted from the signal becomes wider and the peak becomes smaller. The problem of EMI can be reduced with SS. In the case where the bit rate of the signal is high or the transmission distance is long, the frequency of the signal is preferably modulated with the SS. As a modulation degree of frequencies by SS, ±1.0% or more is sometimes required. For example, a serializer device that converts parallel data into serial data and outputs the serial data latches the parallel data at a timing indicated by the 1 st clock having a low frequency and outputs the serial data at a