CN-112698173-B - Nondestructive testing method for peak junction temperature of inner chips of multi-chip parallel packaging module

CN112698173BCN 112698173 BCN112698173 BCN 112698173BCN-112698173-B

Abstract

The invention discloses a nondestructive testing method for peak chip temperature of a parallel device in a module, which realizes peak junction temperature measurement of the parallel device or the module by constructing a temperature-conduction voltage drop curve cluster based on current duty ratio under specific test current. Obtaining a temperature correction current-temperature-conduction voltage drop three-dimensional database, obtaining a temperature-conduction voltage drop curve cluster based on a current ratio under a specific test current by utilizing a current conversion formula according to the number of the test current and the parallel devices, obtaining a current ratio-temperature curve under different test currents by utilizing the curve cluster and measuring conduction voltage drops corresponding to small test currents under the working state of the devices, and finally determining peak junction temperature and current ratio of the parallel devices or modules according to intersection points of the current ratio-temperature curves under different test currents. By using the method, the nondestructive measurement of the peak chip temperature of the parallel device in the module can be realized on the basis of a mature low-current voltage drop method without adding additional equipment.

Inventors

GUO CHUNSHENG
WEI LEI
ZHANG SHIWEI
ZHAO DI

Assignees

北京工业大学

Dates

Publication Date: 20260512
Application Date: 20201206

Claims (7)

1. The nondestructive testing method for the peak junction temperature of the chips in the multi-chip parallel packaging module comprises a to-be-tested multi-chip parallel switching module (1), a parallel testing fixture (2), an incubator or a temperature control platform (3) and a test source table (4), wherein the incubator or the temperature control platform (3) is used for heating the module (1), and the test source table (4) is used for applying different currents to the to-be-tested multi-chip parallel switching module (1) and measuring conduction voltage drop, and is characterized by comprising the following steps: Placing the tested multi-chip-containing parallel switch module (1) on the parallel test fixture (2), then placing the tested multi-chip-containing parallel switch module (1) on the temperature box or the temperature control platform (3), and heating the tested multi-chip-containing parallel switch module (1) by using the temperature box or the temperature control platform (3); setting the initial temperature of the temperature box or the temperature control platform (3) to ensure that the temperature of the measured multi-chip-containing parallel switch module (1) is stabilized at the set temperature of the temperature box or the temperature control platform (3), applying temperature correction current according to a certain step length by using the test source meter (4) after the temperature is stabilized, and obtaining the conduction voltage drop of the measured multi-chip-containing parallel switch module (1) under different temperature correction currents through testing; Step three, changing the temperature of the temperature box or the temperature control platform (3) according to a certain step length, repeating the temperature correction current test in the step two, and measuring the conduction voltage drop of the tested multi-chip-containing parallel switch module (1) under different temperatures and temperature correction currents; converting the temperature correction current into current duty ratio according to the specific test current and the number of the tested parallel chips containing the multi-chip parallel switch module (1), and then drawing voltage-temperature curve clusters under different current duty ratios based on the specific test current; Step five, applying normal working heavy current and specific test current to the tested multi-chip-containing parallel switch module (1), and after the work is stable, disconnecting the working current to obtain the conduction voltage drop of the tested multi-chip-containing parallel switch module (1) under the specific test current; Step six, according to the conduction voltage drop of the tested multi-chip-contained parallel switch module (1) based on specific test current, correcting voltage-temperature curve clusters under different current duty ratios, obtaining corresponding current duty ratios and temperature values, and drawing a current duty ratio-temperature curve under specific current; And step seven, determining the peak junction temperature and the corresponding current duty ratio of the tested multi-chip-contained parallel switch module (1) according to the intersection points of the current duty ratio-temperature curves under different specific test currents.
2. The nondestructive testing method for the peak junction temperature of the chips in the multi-chip parallel packaging module according to claim 1 is characterized in that the highest chip junction temperature, namely the peak junction temperature, of the multi-chip parallel packaging module (1) to be tested can be obtained according to the conduction voltage drop of the multi-chip parallel packaging module (1) to be tested under a specific current without measuring the electrical parameters of the chips in the multi-chip parallel packaging module (1) to be tested.
3. The nondestructive testing method for peak junction temperature of chips in a multi-chip parallel packaging module according to claim 1, wherein in the step one, the tested multi-chip parallel switching module is heated, discrete devices are placed in parallel on the temperature box or the temperature control platform (3) through the parallel testing clamp (2), and the multi-chip module is directly placed on the temperature box or the temperature control platform (3) for heating.
4. The nondestructive testing method for peak junction temperature of chips in a multi-chip parallel package module according to claim 1, wherein the temperature correction current in the second step is a small current which does not cause the multi-chip parallel switch module (1) to be tested, and is a main total current of the multi-chip parallel switch module (1) to be tested, and the temperature correction current is small, so that the power consumption is low, and the self-temperature rise of the multi-chip parallel switch module to be tested is avoided.
5. The nondestructive testing method of the chip peak junction temperature in the multi-chip parallel package module according to claim 1, wherein the specific conversion formula for converting the temperature correction current into the current duty ratio according to the specific test current and the number of the chips in the tested multi-chip parallel switch module (1) in parallel is as follows: ; The current duty ratio is P, the temperature correction current is I A , the specific test current is I B , and the number of the parallel-connected tested multi-chip-containing parallel switch modules is N.
6. The method for non-destructive testing of the peak junction temperature of the chips in the multi-chip parallel package module according to claim 1 is characterized in that the method for testing the current duty ratio-temperature curve under the specific current in the step six is that the conduction voltage drop value of the tested multi-chip parallel switch module (1) under the specific current is substituted into voltage-temperature curve clusters under different current duty ratios corresponding to each specific test current to obtain a series of temperature values under different current duty ratios under each specific test current, and then a fitting is drawn to obtain a current duty ratio-temperature change curve.
7. The nondestructive testing method for peak junction temperature of chips in a multi-chip parallel package module according to claim 1, wherein the number of test currents is not less than two, and the number of specific currents is not less than two.

Description

Nondestructive testing method for peak junction temperature of inner chips of multi-chip parallel packaging module Technical Field The invention relates to a method for testing peak junction temperature of chips in a multi-chip parallel packaging module, belonging to the field of power semiconductor device testing. Background The power semiconductor switching device/module is used as one of key components in a power electronic system, is mainly applied to an inverter, a rectifier and the like, realizes control and conversion of electric energy, and is a core of a power conversion technology. The method is widely applied to the fields of new energy automobiles, railway transportation, wind power generation, high-voltage power transmission and distribution and the like, and the current, voltage and power capacity requirements of the method are increased in various application fields. When the high-voltage, high-current and high-power application is solved, the current capacity of the existing single discrete device can not meet the high-capacity power conversion requirement, the manufacturing difficulty of the single discrete device with high capacity is high, the cost is high, and the current capacity or the power expansion is realized by adopting a modularized mode of parallel discrete devices or multi-chip parallel packaging based on the power class and the current capacity limitation of the single device. In parallel use, due to the difference of chips and different heat dissipation conditions, the thermal power consumption generated in the work causes the temperature distribution of the chips to be uneven, wherein the reliability and the service life of the chip with the highest temperature determine the upper limit of the use reliability of a parallel system or a module, so the method is particularly important for measuring the peak junction temperature of parallel devices or modules. Currently, there are mature methods and systems for junction temperature measurement of single semiconductor devices, and nondestructive junction temperature measurement without damaging packaging is mainly based on a small current voltage drop method based on an electrical method and thermal resistance calculation. In the parallel application system, since the chips are packaged in parallel in the same module, the testing of each chip branch is difficult to realize, and the main circuit of the parallel device is measured by using the traditional single device testing method, the error between the testing result and the peak junction temperature is larger, and the reliability of the parallel device or the module is difficult to evaluate. At the same time, for peak junction temperature measurement of parallel devices or modules, only an infrared measurement mode of damaging packaging can be adopted, and no suitable nondestructive electrical test method exists. In particular, for novel packages such as crimping, electrical connection cannot be ensured after the package is damaged, and measuring methods such as infrared are not applicable. Disclosure of Invention Aiming at the problems, the invention provides a method for testing the peak junction temperature of the inner chips of the multi-chip parallel packaging module, which realizes the measurement of the peak junction temperature of the multi-chip parallel connection by the transformation evolution of a temperature calibration curve library on the basis of a low-current voltage drop method. According to the method, an additional test circuit is not required to be added, and the measurement of a temperature calibration curve and the measurement of the peak junction temperature can be performed by using small current test equipment under the existing mature system. The technical scheme adopted by the invention is as follows: And under different temperatures and temperature correction currents, conducting voltage drop measurement is carried out on the whole parallel devices or modules to obtain a three-dimensional database of temperature-temperature correction current-conducting voltage drop, specific test currents are selected, and a temperature-conducting voltage drop temperature correction curve cluster related to the current ratio under any specific test current is obtained according to a current ratio conversion formula. And then when the device works, the voltage of the parallel device or the module is measured according to the specific test current, the voltage-temperature curve cluster under different current duty ratios corresponding to each specific test current is substituted, a series of temperature values under different current duty ratios under each specific test current is obtained, and then a fitting is drawn to obtain a current duty ratio-temperature change curve. And finally, determining the peak junction temperature of the parallel device or module according to the intersection point of the current ratio-temperature curves under different specific test c