CN-113257874-B - Display device

CN113257874BCN 113257874 BCN113257874 BCN 113257874BCN-113257874-B

Abstract

A display device includes a substrate having a display region and a non-display region. A plurality of pixels is arranged in the display area. The chip mounting region is disposed in the non-display region. The chip mounting region includes a data output pad unit, a light emitting test transistor unit, and a plurality of lines connecting the data output pad unit and the light emitting test transistor unit. The light emitting test transistor unit is configured to transmit at least one light emitting test signal to the plurality of pixels through the data output pad unit. The resistance of each of the plurality of lines is the same.

Inventors

Li Zhengdou
Jin Minyou

Assignees

三星显示有限公司
三星显示有限公司

Dates

Publication Date: 20260421
Application Date: 20210210
Priority Date: 20200212

Claims (10)

1. A display device, comprising: a substrate including a display region and a non-display region; a plurality of pixels arranged in the display area, and A chip mounting region disposed in the non-display region, the chip mounting region including a data output pad unit, a light emitting test transistor unit configured to transmit at least one light emitting test signal to the plurality of pixels through the data output pad unit, and a plurality of lines connecting the data output pad unit and the light emitting test transistor unit, Wherein the resistance of each of the plurality of lines is the same.
2. The display device according to claim 1, wherein: The data output pad unit includes a first data output pad, a second data output pad, and a third data output pad arranged in a plurality of rows; The light emitting test transistor unit includes a first light emitting test transistor, a second light emitting test transistor, and a third light emitting test transistor arranged in a plurality of rows, and The length of the first line connecting the first data output pad to the first end of the first light emitting test transistor, the length of the second line connecting the second data output pad to the first end of the second light emitting test transistor, and the length of the third line connecting the third data output pad to the first end of the third light emitting test transistor are the same.
3. The display device according to claim 2, wherein: the chip mounting region further includes a data input pad unit connected to the light emitting test transistor unit, and The data input pad unit is connected to a plurality of ground lines.
4. A display device according to claim 3, wherein: the gate electrodes of the first, second and third light emission test transistors are connected to lines supplying first, second and third light emission test control signals, respectively, and The second terminal of the first light emitting test transistor, the second terminal of the second light emitting test transistor, and the second terminal of the third light emitting test transistor are connected to a first test signal line, a second test signal line, and a third test signal line, respectively.
5. The display device of claim 2, wherein the chip mounting area further comprises: A dummy output pad unit disposed at least one side of the data output pad unit, and And a dummy transistor unit connected to the dummy output pad unit.
6. The display device according to claim 5, wherein: the dummy output pad unit includes a first dummy output pad, a second dummy output pad, and a third dummy output pad arranged in a plurality of rows; The dummy transistor unit includes a first dummy transistor, a second dummy transistor, and a third dummy transistor arranged in a plurality of rows, and The length of the fourth line connecting the first dummy output pad to the first end of the first dummy transistor, the length of the fifth line connecting the second dummy output pad to the first end of the second dummy transistor, and the length of the sixth line connecting the third dummy output pad to the first end of the third dummy transistor are the same.
7. The display device according to claim 6, wherein the length of the first line, the length of the second line, and the length of the third line are longer than the length of the fourth line, the length of the fifth line, and the length of the sixth line, respectively.
8. The display device according to claim 6, wherein: the chip mounting region includes a dummy input pad unit connected to the dummy transistor unit, and The dummy input pad unit is connected to a plurality of ground lines.
9. The display device according to claim 6, wherein, a gate electrode of the first dummy transistor, a gate electrode of the second dummy transistor, a gate electrode of the third dummy transistor, and a second end of the first dummy transistor the second end of the second dummy transistor and the second end of the third dummy transistor are in a floating state.
10. The display device according to claim 1, wherein: The data output pad unit includes a first data output pad, a second data output pad, and a third data output pad arranged in a plurality of rows; The light emitting test transistor unit includes a first light emitting test transistor, a second light emitting test transistor, and a third light emitting test transistor arranged in a plurality of rows, At least one of a first line connecting the first data output pad to a first end of the first light emitting test transistor, a second line connecting the second data output pad to a first end of the second light emitting test transistor, and a third line connecting the third data output pad to a first end of the third light emitting test transistor includes a bent portion; The length of the first line, the length of the second line and the length of the third line are the same, and At least two of a shortest distance from the first data output pad to the first end of the first light emitting test transistor, a shortest distance from the second data output pad to the first end of the second light emitting test transistor, and a shortest distance from the third data output pad to the first end of the third light emitting test transistor are different from each other.

Description

Display device Cross Reference to Related Applications The present application claims priority from korean patent application No. 10-2020-0017182 filed in the korean intellectual property office on 2/12/2020, the disclosure of which is incorporated herein by reference in its entirety. Technical Field The present inventive concept relates to a display apparatus. Background The display device is a device that displays an image. The display device includes a display panel such as an organic light emitting display panel or a liquid crystal display panel. An organic light emitting diode display device (OLED display device) is a self-emission type display device. The OLED display device includes an organic light emitting layer interposed between a pixel electrode and a counter electrode. When the pixel electrode and the counter electrode inject electrons and holes, respectively, into the organic light emitting layer, excitons are generated by recombination of the electrons and holes. Light is generated when the exciton falls from an excited state to a ground state. A display device using a chip-on-plastic (COP) or chip-on-glass (COG) method for directly attaching a driving integrated circuit to a transistor array substrate includes a chip mounting region to which the driving integrated circuit is bonded. The chip mounting region may include a plurality of output pads electrically connected to the output bumps of the driving integrated circuit, and a plurality of input pads electrically connected to the input bumps of the driving integrated circuit to supply signals to the driving integrated circuit from the outside. The light emission test may be performed in a process of manufacturing a display panel of the display device. The light emission test detects whether the display panel is driven by applying a test signal to the display panel in a state in which the driving integrated circuit is not mounted in the chip mounting area. In such a display device, static electricity may be generated in a manufacturing process of the display device. When static electricity is generated and transferred to the light emission test thin film transistor, the thin film transistor may be damaged and a normal light emission test may not be performed. Disclosure of Invention It is a technical object of the present inventive concept to provide a display device that protects a light emitting test thin film transistor from static electricity generated during a manufacturing process. The objects of the present disclosure are not limited to the above technical objects, and other technical objects not described will be clearly understood by those skilled in the art from the following description. According to an exemplary embodiment of the inventive concept, a display device includes a substrate having a display region and a non-display region. A plurality of pixels is arranged in the display area. The chip mounting region is disposed in the non-display region. The chip mounting region includes a data output pad unit, a light emitting test transistor unit, and a plurality of lines connecting the data output pad unit and the light emitting test transistor unit. The light emitting test transistor unit is configured to transmit at least one light emitting test signal to the plurality of pixels through the data output pad unit. The resistances of the plurality of lines connected between the data output pad unit and the light emitting test transistor unit are the same. The data output pad unit may include a first data output pad, a second data output pad, and a third data output pad configured in a plurality of rows, the light emitting test transistor unit may include a first light emitting test transistor, a second light emitting test transistor, and a third light emitting test transistor configured in a plurality of rows, and a length of a first line connecting one ends of the first data output pad and the first light emitting test transistor to each other, a length of a second line connecting one ends of the second data output pad and the second light emitting test transistor to each other, and a length of a third line connecting one ends of the third data output pad and the third light emitting test transistor to each other may be the same. The first, second and third data output pads may have a quadrilateral shape such as a parallelogram. The chip mounting region may further include a data input pad unit connected to the light emitting test transistor unit, and the data input pad unit may be connected to a plurality of ground lines. Each of the resistances of the plurality of ground lines may be 500kΩ to 1mΩ. The gate electrode of the first light emitting test transistor, the gate electrode of the second light emitting test transistor, and the gate electrode of the third light emitting test transistor may be connected to lines supplying the first light emitting test control signal, the second light emitting test control signal, and the thi