CN-113632209-B - RF semiconductor device and method for manufacturing the same
Abstract
The present disclosure relates to a Radio Frequency (RF) device that includes a molding-device die and a multi-layer redistribution structure located beneath the molding-device die. A molding device die includes a device region having a back end of line (BEOL) portion and a front end of line (FEOL) portion located over the BEOL portion, and a first molding compound. The FEOL portion includes an active layer, a contact layer, and an isolation section. Herein, the active layer and the isolation section are located above the contact layer, and the active layer is surrounded by the isolation section. A first molding compound is located over the active layer without a silicon crystal having no germanium content between the first molding compound and the active layer. The multi-layer redistribution structure includes a redistribution interconnect and a plurality of bump structures located at a bottom of the multi-layer redistribution structure and electrically coupled to the molding-device die through the redistribution interconnect.
Inventors
- JULIO C. COSTA
- CARROLL MICHAEL
Assignees
- QORVO美国公司
Dates
- Publication Date
- 20260512
- Application Date
- 20190530
- Priority Date
- 20190123
Claims (19)
- 1. A radio frequency device, comprising: molding a device die comprising a device region, an additional layer, and a first molding compound, wherein: the device region includes a front-end-of-line portion and a back-end-of-line portion, the back-end-of-line portion being located below the front-end-of-line portion and including a connection layer; The front end of line portion includes an active layer, a contact layer, and an isolation section formed of silicon dioxide, wherein the active layer and the isolation section are located over the contact layer, the isolation section surrounds the active layer, the isolation section is not located over the active layer, and the isolation section extends vertically beyond a top surface of the active layer to define an opening within the isolation section and over the active layer; The additional layer is in contact with the top surface of the active layer of the front-end-of-line portion and is located within the opening, wherein the additional layer is formed of silicon germanium or silicon nitride, and The first molding compound being located directly over the additional layer to fill the opening, wherein there are no silicon crystals having no germanium content between the first molding compound and the active layer, and A multi-layer redistribution structure formed under the back-end-of-line portion of the molding-device die, wherein the multi-layer redistribution structure comprises a plurality of bump structures on a bottom surface of the multi-layer redistribution structure and redistribution interconnects within the multi-layer redistribution structure, wherein the plurality of bump structures are electrically coupled to the front-end-of-line portion of the molding-device die through the redistribution interconnects and the connection layer within the back-end-of-line portion.
- 2. The radio frequency apparatus of claim 1, wherein a portion of the first molding compound is located over the isolation section, wherein the first molding compound is formed from a thermoplastic or thermoset polymeric material.
- 3. The rf device of claim 1, wherein the additional layer is formed of silicon nitride and completely covers the active layer of the front-end-of-line process.
- 4. The radio frequency device of claim 1, wherein the additional layer is formed of silicon germanium.
- 5. The radio frequency device of claim 1, wherein the thermal conductivity of the first molding compound is greater than 1W/m-K.
- 6. The radio frequency device of claim 1, wherein the dielectric constant of the first molding compound is less than 8.
- 7. The radio frequency apparatus of claim 1, wherein the dielectric constant of the first molding compound is between 3 and 5.
- 8. The radio frequency device of claim 1, wherein the front-end-of-line portion is configured to provide at least one of a switching field effect transistor, a diode, a capacitor, a resistor, and an inductor.
- 9. A radio frequency device, comprising: molding a device die comprising a device region, an additional layer, and a first molding compound, wherein: the device region includes a front-end-of-line portion and a back-end-of-line portion, the back-end-of-line portion being located below the front-end-of-line portion and including a connection layer; The front end of line portion includes an active layer, a contact layer, and an isolation section formed of silicon dioxide, wherein the active layer and the isolation section are located over the contact layer, the isolation section surrounds the active layer, the isolation section is not located over the active layer, and the isolation section extends vertically beyond a top surface of the active layer to define an opening within the isolation section and over the active layer; The additional layer is in contact with the top surface of the active layer of the front-end-of-line portion and is located within the opening, wherein the additional layer is formed of silicon germanium or silicon nitride, and The first molding compound is located directly over the additional layer to fill the opening, wherein there are no silicon crystals between the first molding compound and the active layer that do not have germanium content; A multi-layer redistribution structure formed under the back-end-of-line portion of the molding-device die, wherein the multi-layer redistribution structure comprises a plurality of bump structures on a bottom surface of the multi-layer redistribution structure and redistribution interconnects within the multi-layer redistribution structure, wherein the plurality of bump structures are electrically coupled to the front-end-of-line portion of the molding-device die through the redistribution interconnects and the connection layer within the back-end-of-line portion, and A second molding compound over the multi-layer redistribution structure and encapsulating the molding device die.
- 10. The radio frequency apparatus of claim 9, wherein the first molding compound is formed of the same material as the second molding compound.
- 11. The radio frequency device of claim 9, wherein the first molding compound and the second molding compound are formed of different materials.
- 12. A method of forming a radio frequency device, comprising: providing a precursor wafer having a plurality of device regions, wherein: each device region of the plurality of device regions includes a back-end-of-line process portion and a front-end-of-line process portion located above the back-end-of-line process portion; the front end of line portion includes an active layer, a contact layer, and an isolation section, wherein the active layer and the isolation section are located above the contact layer, the isolation section surrounds the active layer, and the active layer does not extend vertically beyond the isolation section; An interfacial layer formed of silicon germanium directly over the active layer of each of the plurality of device regions, and The silicon handle substrate is directly positioned on each interface layer; Completely removing the silicon processing substrate; Removing the interfacial layer to expose the active layer of each of the plurality of device regions, and Applying a first molding compound to provide a molding-device wafer comprising a plurality of molding-device dies, wherein: the first molding compound is applied over the active layer of each of the plurality of device regions after the interfacial layer is removed; Absence of silicon crystals having no germanium content between the active layer and the first molding compound of each of the plurality of device regions, and Each molding-device die of the plurality of molding-device dies includes a corresponding device region and a portion of the first molding compound that is located over the active layer of the corresponding device region.
- 13. The method as recited in claim 12, further comprising: Bonding the precursor wafer to a temporary carrier through a bonding layer prior to removing the silicon handle substrate, and After the first molding compound is applied, the temporary carrier is disengaged from the precursor wafer and the bonding layer is removed from the precursor wafer.
- 14. The method of claim 12, further comprising forming a multi-layer redistribution structure under the molding-device wafer, wherein the multi-layer redistribution structure comprises a plurality of bump structures on a bottom surface of the multi-layer redistribution structure and redistribution interconnects within the multi-layer redistribution structure, wherein each bump structure of the plurality of bump structures is electrically coupled to one active layer of a corresponding molding-device die through the redistribution interconnects and a connection layer within the back-end-of-line portion of the corresponding molding-device die.
- 15. The method as recited in claim 12, further comprising: singulating the molding-device wafer into a plurality of individual molding-device dies; applying a second molding compound around and over the plurality of individual molding-device dies to provide a dual-molding-device wafer, wherein: The second molding compound encapsulates a top surface and a side surface of each of the plurality of individual molding-device dies, while a bottom surface of each of the plurality of individual molding-device dies is exposed, and The bottom surface of the dual molding-device wafer is a combination of the bottom surface of each of the plurality of individual molding-device dies and a bottom surface of the second molding compound, and A multi-layer redistribution structure is formed under the dual-mold device wafer, wherein the multi-layer redistribution structure includes a plurality of bump structures on a bottom surface of the multi-layer redistribution structure and redistribution interconnects within the multi-layer redistribution structure, wherein each bump structure of the plurality of bump structures is electrically coupled to one active layer of a corresponding individual mold device die through the redistribution interconnects and a connection layer within the back-end-of-line portion of the corresponding individual mold device die.
- 16. The method of claim 12, wherein the active layer of each device region of the plurality of device regions is in contact with the first molding compound after applying the first molding compound.
- 17. The method of claim 12, further comprising applying a passivation layer directly over the active layer of each device region of the plurality of device regions prior to applying the first molding compound, wherein: The passivation layer is formed of silicon dioxide, silicon nitride or a combination of the two, and After the first molding compound is applied, the passivation layer is in contact with the first molding compound.
- 18. The method of claim 12, wherein providing the precursor wafer comprises: providing a Si-SiGe-Si wafer comprising a common silicon epitaxial layer, a common interface layer on the common silicon epitaxial layer, and the silicon handle substrate on the common interface layer, wherein the interface layer comprises silicon germanium, and Performing a complementary metal oxide semiconductor process to provide the precursor wafer, wherein: the isolation section extends through the common silicon epitaxial layer and the common interface layer and into the silicon handle substrate such that the common interface layer is separated into a plurality of separate interface layers, and the common silicon epitaxial layer is separated into a plurality of separate silicon epitaxial layers, Each active layer of the plurality of device regions is formed of a corresponding separate epitaxial layer of silicon, and Each of the plurality of separate interface layers is directly over a top surface of a corresponding active layer, and the silicon handle substrate is directly over the plurality of separate interface layers.
- 19. The method of claim 12, wherein providing the precursor wafer comprises: providing a Si-SiGe-Si wafer comprising a common silicon epitaxial layer, a common interface layer located over the common silicon epitaxial layer, and the silicon handle substrate located over the common interface layer, wherein: the common interface layer is formed of silicon germanium, and The common interface layer comprising a plurality of interface layers connected, and Performing a complementary metal oxide semiconductor process to provide the precursor wafer, wherein: The isolation section extends through the common silicon epitaxial layer and into the common interface layer such that the common silicon epitaxial layer is separated into a plurality of individual silicon epitaxial layers and the plurality of interface layers remain connected; Each active layer of the plurality of device regions is formed of a corresponding separate epitaxial layer of silicon, and Each of the plurality of interface layers is located directly above a top surface of a corresponding active layer, and the silicon handle substrate is still located directly above the common interface layer.
Description
RF semiconductor device and method for manufacturing the same RELATED APPLICATIONS The present application claims the benefit of provisional patent application serial No. 62/795,804 filed on 1 month 23 2019, the disclosure of which is incorporated herein by reference in its entirety. The present application relates to a concurrently filed U.S. patent application No. entitled "RF device with enhanced performance and method of forming (RF DEVICES WITH ENHANCED PERFORMANCE AND METHODS OF FORMING THE SAME)" the disclosure of which is incorporated herein by reference in its entirety. Technical Field The present disclosure relates to a Radio Frequency (RF) device and a process for manufacturing the same, and more particularly to an RF device having enhanced thermal and electrical properties, and a wafer level packaging process for providing an RF device having enhanced performance. Background The widespread use of cellular devices and wireless devices has driven the rapid development of Radio Frequency (RF) technology. The substrate on which the RF device is fabricated plays an important role in achieving high level performance of RF technology. Fabrication of RF devices on conventional silicon substrates may benefit from low cost silicon materials, large scale wafer throughput, sophisticated semiconductor design tools, and sophisticated semiconductor fabrication techniques. While the use of conventional silicon substrates is beneficial for RF device fabrication, it is well known in the industry that conventional silicon substrates may have two undesirable properties for RF devices, harmonic distortion and low resistivity values. Harmonic distortion is a key obstacle to achieving high levels of linearization in RF devices built on top of silicon substrates. In addition, high-speed and high-performance transistors are more densely integrated in RF devices. Thus, since a large number of transistors are integrated on the RF device, a large amount of power passes through the transistors, and/or the transistors operate at high speeds, the heat generated by the RF device will increase significantly. It is therefore desirable to package RF devices in a configuration for achieving better heat dissipation. Wafer level fan-out (WLFO) packaging technology and embedded wafer level ball grid array (EWLB) technology are currently attracting attention in portable RF applications. WLFO and EWLB techniques are designed to provide high density input/output ports (I/O) without increasing the package size. This capability allows RF devices to be densely packed within a single wafer. In order to accommodate the increase in heating value of the RF device and reduce the harmful harmonic distortion of the RF device and take advantage of WLFO/EWLB packaging technology, it is therefore an object of the present disclosure to provide an improved packaging process for enhanced thermal and electrical performance. Further, there is a need to enhance the performance of RF devices without increasing the package size. Disclosure of Invention The present disclosure relates to a Radio Frequency (RF) device having enhanced thermal and electrical properties and a process for manufacturing the same. The disclosed RF device includes a molding-device die and a multi-layer redistribution structure. The molding-device die includes a first molding compound and a device region having a front-end-of-line (FEOL) portion and a back-end-of-line (BEOL) portion. The FEOL part has an active layer, a contact layer and an isolation section. Herein, the active layer and the isolation section are located above the contact layer, the isolation section surrounds the active layer, and the active layer does not vertically extend beyond the isolation section. The BEOL is located below the FEOL portion and includes a connection layer. The first mold compound is located over the active layer of the FEOL portion without a silicon crystal having no germanium content between the first mold compound and the active layer. The multi-layer redistribution structure is formed under the BEOL portion of the molding-device die. The multi-layer redistribution structure includes a plurality of bump structures on a bottom surface of the multi-layer redistribution structure and redistribution interconnects within the multi-layer redistribution structure. The bump structure is electrically coupled to the FEOL portion of the molding-device die through the redistribution interconnect and the connection layer within the BEOL portion. In one embodiment of the RF device, a portion of the first molding compound is located over the isolation section. In one embodiment of the RF device, the isolation section extends vertically beyond a top surface of the active layer to define an opening within the isolation section and above the active layer. Herein, the first molding compound fills the opening. According to a further embodiment, the RF device further comprises a passivation layer directly over the