Search

CN-113903753-B - Active matrix substrate and method for manufacturing same

CN113903753BCN 113903753 BCN113903753 BCN 113903753BCN-113903753-B

Abstract

An active matrix substrate is provided which has a top gate structure and a plurality of oxide semiconductor TFTs having different characteristics from each other. An active matrix substrate includes a 1 st TFT and a2 nd TFT each having an oxide semiconductor layer and a gate electrode disposed on a part of the oxide semiconductor layer through a gate insulating layer, wherein in the 1 st TFT, a 1 st region of the oxide semiconductor layer covered with the gate electrode through the gate insulating layer has a laminated structure including a lower oxide semiconductor film and an upper oxide semiconductor film over the entire region, mobility of the upper oxide semiconductor film is higher than that of the lower oxide semiconductor film, and in the 2 nd TFT, at least a part of the 1 st region of the oxide semiconductor layer includes one oxide semiconductor film of the lower oxide semiconductor film and the upper oxide semiconductor film, and does not include the other oxide semiconductor film.

Inventors

  • YAMANAKA MASAMITSU
  • CHIKAMA YOSHIMASA

Assignees

  • 夏普株式会社

Dates

Publication Date
20260512
Application Date
20210705
Priority Date
20200706

Claims (12)

  1. 1. An active matrix substrate having a display region including a plurality of pixel regions and a non-display region provided around the display region, comprising: A substrate, and A plurality of oxide semiconductor TFTs supported on the substrate and provided in the display region or the non-display region, each of the plurality of oxide semiconductor TFTs including an oxide semiconductor layer, a gate electrode provided on a part of the oxide semiconductor layer via a gate insulating layer, and a source electrode and a drain electrode, The oxide semiconductor layer includes a1 st region covered with the gate electrode via the gate insulating layer, and a1 st contact region and a2 nd contact region located on both sides of the 1 st region, the 1 st contact region being electrically connected to the source electrode, the 2 nd contact region being electrically connected to the drain electrode, The above-mentioned plurality of oxide semiconductor TFTs include a 1 st TFT and a2 nd TFT, In the 1 st TFT, the oxide semiconductor layer has a laminated structure including a lower oxide semiconductor film and an upper oxide semiconductor film disposed on the lower oxide semiconductor film, mobility of the upper oxide semiconductor film and mobility of the lower oxide semiconductor film are different from each other, In the 2 nd TFT, the 1 st contact region and the 2 nd contact region of the oxide semiconductor layer have the laminated structure, but at least a part of the 1 st region includes one oxide semiconductor film of the lower oxide semiconductor film and the upper oxide semiconductor film and does not include the other oxide semiconductor film, Each of the plurality of oxide semiconductor TFTs further has an insulating layer covering the oxide semiconductor layer and the gate electrode, The source electrode is in contact with the 1 st contact region in a 1 st opening formed in the insulating layer, and the drain electrode is in contact with the 2 nd contact region in a 2 nd opening formed in the insulating layer.
  2. 2. The active matrix substrate according to claim 1, wherein, The at least a portion of the 1 st region in the 2 nd TFT includes the lower oxide semiconductor film, and does not include the upper oxide semiconductor film.
  3. 3. The active matrix substrate according to claim 1, wherein, The at least a portion of the 1 st region in the 2 nd TFT includes the upper oxide semiconductor film, and does not include the lower oxide semiconductor film.
  4. 4. An active matrix substrate according to any one of claims 1 to 3, wherein, In the 2 nd TFT, a part of the 1 st region of the oxide semiconductor layer has the laminated structure, and the other part includes the one oxide semiconductor film and does not include the other oxide semiconductor film.
  5. 5. An active matrix substrate according to any one of claims 1 to 3, wherein, In the 2 nd TFT, the entire region of the 1 st region of the oxide semiconductor layer includes the one oxide semiconductor film and does not include the other oxide semiconductor film.
  6. 6. An active matrix substrate according to any one of claims 1 to 3, wherein, The mobility of the upper oxide semiconductor film is higher than the mobility of the lower oxide semiconductor film.
  7. 7. An active matrix substrate according to any one of claims 1 to 3, wherein, The mobility of the upper oxide semiconductor film is lower than the mobility of the lower oxide semiconductor film.
  8. 8. An active matrix substrate according to any one of claims 1 to 3, wherein, In the 1 st TFT, the gate insulating layer is in contact with the upper surface of the upper oxide semiconductor film, In the 2 nd TFT, the gate insulating layer is in contact with an upper surface of the one oxide semiconductor film.
  9. 9. An active matrix substrate according to any one of claims 1 to 3, wherein, The above-mentioned plurality of oxide semiconductor TFTs further includes a3 rd TFT, In the 2 nd TFT, the entire region of the 1 st region includes one of the lower oxide semiconductor film and the upper oxide semiconductor film, and does not include the other oxide semiconductor film, In the 3 rd TFT, the 1 st contact region and the 2 nd contact region of the oxide semiconductor layer and a part of the 1 st region have the laminated structure, and the other part of the 1 st region includes the one oxide semiconductor film and does not include the other oxide semiconductor film.
  10. 10. An active matrix substrate according to any one of claims 1 to 3, wherein, The above-mentioned plurality of oxide semiconductor TFTs further includes a3 rd TFT, In the 3 rd TFT, the at least a portion of the 1 st region in the oxide semiconductor layer includes the other oxide semiconductor film and does not include the one oxide semiconductor film.
  11. 11. An active matrix substrate according to any one of claims 1 to 3, wherein, The 1 st TFT is disposed in each of the plurality of pixel regions, The 2 nd TFT is included in a peripheral circuit disposed in the non-display region.
  12. 12. An active matrix substrate according to any one of claims 1 to 3, wherein, The plurality of pixel regions each have a pixel circuit including at least a driving TFT, a selecting TFT and a capacitor element, One of the 1 st TFT and the 2 nd TFT is the driving TFT, and the other TFT is the selecting TFT.

Description

Active matrix substrate and method for manufacturing same Technical Field The present invention relates to an active matrix substrate and a method for manufacturing the same. Background An active matrix substrate used for a liquid crystal display device, an organic Electroluminescence (EL) display device, or the like has a display region having a plurality of pixels, and a region other than the display region (non-display region or frame region). In the display region, a switching element such as a thin film transistor (Thin Film Transistor; hereinafter referred to as a "TFT") is provided for each pixel. As such a switching element, a TFT having an amorphous silicon film as an active layer (hereinafter referred to as an "amorphous silicon TFT") and a TFT having a polysilicon film as an active layer (hereinafter referred to as a "polysilicon TFT") have been widely used. As a material of an active layer of the TFT, an oxide semiconductor has been proposed to be used instead of amorphous silicon or polysilicon. Such a TFT is referred to as an "oxide semiconductor TFT". The oxide semiconductor has higher mobility than amorphous silicon. Therefore, the oxide semiconductor TFT can operate at a higher speed than the amorphous silicon TFT. The structure of the TFT is largely divided into a bottom gate structure and a top gate structure. Currently, an oxide semiconductor TFT adopts a bottom gate structure in many cases, but a top gate structure has also been proposed (for example, patent document 1). In the top gate structure, the gate insulating layer can be thinned, and thus high current supply performance can be obtained. In the non-display region of the active matrix substrate, peripheral circuits such as a driving circuit may be monolithically (integrally) formed. By forming the drive circuit monolithically, the reduction in cost due to the reduction in the size of the non-display area and the simplification of the mounting process can be realized. For example, in a non-display region, a gate driver circuit may be formed monolithically, and a source driver circuit may be mounted by COG (Chip on Glass) method. In a device requiring a high demand for narrowing a frame such as a smart phone, a multiplexing circuit such as a Source switching (Source SHARED DRIVING: SSD) circuit may be formed not only monolithically but also monolithically. The SSD circuit is a circuit that distributes video data to a plurality of source wirings from 1 video signal line from each terminal of the source driver. By mounting the SSD circuit, a region (terminal portion/wiring forming region) in which the terminal portion and the wiring are arranged in the non-display region can be made narrower. In addition, since the number of outputs from the source driver is reduced, the circuit scale can be reduced, and thus the cost of the driver IC can be reduced. Peripheral circuits such as a driving circuit and an SSD circuit include TFTs. In this specification, a TFT disposed as a switching element in each pixel of a display region is referred to as a "pixel TFT", and a TFT constituting a peripheral circuit is referred to as a "circuit TFT". Among the TFTs of the circuit, the TFT constituting the driving circuit is referred to as a "driving circuit TFT", and the TFT constituting the SSD circuit is referred to as an "SSD circuit TFT". In an active matrix substrate in which an oxide semiconductor TFT is used as a pixel TFT, it is preferable that a circuit TFT is also formed using the same oxide semiconductor film as the pixel TFT and using a common process from the viewpoint of manufacturing process. Therefore, the circuit TFT and the pixel TFT generally have the same structure. The characteristics of these TFTs are also substantially the same. Prior art literature Patent literature Patent document 1 Japanese patent application laid-open No. 2015-109315 Disclosure of Invention Problems to be solved by the invention However, the characteristics required for the pixel TFT and the circuit TFT are respectively different. In addition, even among the circuit TFTs, for example, the characteristics required for the TFT for a driving circuit and the TFT for an SSD circuit are different. In recent years, the variety of peripheral circuits monolithically formed on an active matrix substrate has increased, and with this, the performance required of the circuit TFT has further diversified. In addition, in the organic EL display device, a pixel circuit including at least two types of pixel TFTs (referred to as a "driving TFT" and a "selecting TFT") and a capacitor element is provided within 1 pixel. The selection TFT has a function of changing an applied voltage to the driving TFT to select a pixel. The driving TFT has a function of supplying a current necessary for light emission. The selection TFT and the driving TFT have different functions, and thus, the required characteristics may be different. In order to provide each TFT with characteristics required f