CN-113990860-B - Low-cost electrostatic protection method

CN113990860BCN 113990860 BCN113990860 BCN 113990860BCN-113990860-B

Abstract

The embodiment of the application discloses a low-cost electrostatic protection method which comprises the steps of providing a first chip, arranging an integrated circuit on the first chip, providing a second chip, arranging an electrostatic protection circuit on the second chip, and connecting the first power supply outlet port with the power supply port of the integrated circuit, wherein the electrostatic protection circuit comprises a first power supply outlet port, a second power supply outlet port and a first capacitor, and when electrostatic pulses flow in from the second power supply outlet port, the first capacitor can absorb the electrostatic pulses, the electrostatic damage of the integrated circuit is restrained, and meanwhile, the capacitance cost is low, so that the method realizes electrostatic protection and meanwhile, the protection cost is low. In addition, the integrated circuit and the electrostatic protection circuit are arranged on different chips, electrostatic protection design is not needed on the chip where the integrated circuit is located, the problem that electrostatic protection design cannot be carried out on the integrated circuit due to limitation of a substrate material of the chip where the integrated circuit is located is avoided, and electrostatic protection of the novel integrated circuit can be achieved.

Inventors

LI XIAOJING
LUO JIAJUN
ZHAO FAZHAN
HAN ZHENGSHENG
ZENG CHUANBIN
GAO LINCHUN
NI TAO
WANG JUANJUAN
LI DUOLI
YAN WEIWEI
SHAN LIANG
LI MINGZHU

Assignees

中国科学院微电子研究所

Dates

Publication Date: 20260508
Application Date: 20211027

Claims (8)

1. A low cost electrostatic protection method, comprising: providing a first chip, and arranging an integrated circuit on the first chip, wherein the integrated circuit comprises a power port; providing a second chip, and arranging an electrostatic protection circuit on the second chip, wherein the first chip is a carbon-based chip, and the second chip is a silicon-based chip; The electrostatic protection circuit comprises a power supply outlet port, a first capacitor, a second resistor and a ground terminal outlet port, wherein the power supply outlet port comprises a first power supply outlet port and a second power supply outlet port, the second power supply outlet port is connected with the first power supply outlet port through a first end of the first capacitor, and a second end of the first capacitor is connected with the ground terminal outlet port; And connecting the first power supply output port with a power supply port of the integrated circuit so that the electrostatic protection circuit performs electrostatic protection on the integrated circuit.
2. The method of claim 1, wherein the capacitance of the first capacitor ranges from 0.05uf to 50uf, inclusive.
3. The electrostatic protection method according to claim 1, wherein the electrostatic protection circuit further comprises a second capacitor and a first N-type FET disposed between the second power supply output port and the first capacitor first end, wherein the second capacitor first end is connected to the first N-type FET drain, the first N-type FET gate is connected to the second capacitor second end, the source is connected to the ground output port, and the ground output port is grounded, the method further comprising: The second power supply output port is connected with the first end of the first capacitor through the first end of the second capacitor and the drain electrode of the first N-type field effect transistor in sequence; the electrostatic protection circuit further includes a first diode, the method further comprising: And connecting the cathode of the first diode with the first power supply output port, and connecting the anode of the first diode with the ground terminal output port.
4. The electrostatic protection method according to claim 3, wherein the integrated circuit further comprises an input port, a second diode, and a third diode, wherein the input port comprises a first input port and a second input port, the second input port is connected to the first input port through a positive electrode of the second diode, a negative electrode of the second diode is connected to the first end of the second capacitor, a negative electrode of the third diode is connected to a positive electrode of the second diode, and a positive electrode of the third diode is connected to the ground port; The electrostatic protection circuit further comprises a first resistor and a second N-type field effect transistor, wherein a first end of the first resistor is connected with the first input/output port, a second end of the first resistor is connected with the anode of the second diode, a drain electrode of the second N-type field effect transistor is connected with the first end of the first resistor, and a source electrode of the second N-type field effect transistor is respectively connected with a grid electrode of the second N-type field effect transistor and the ground terminal output port; The method further comprises the steps of: And connecting the first input/output port with the input port of the integrated circuit so that the electrostatic protection circuit performs electrostatic protection on the integrated circuit.
5. The method of claim 4, wherein the integrated circuit further comprises an output port, a fourth diode, and a fifth diode, wherein the output port comprises a first output port and a second output port, the second output port is connected to the first output port through a positive electrode of the fourth diode, a negative electrode of the fourth diode is connected to the first power supply port, a negative electrode of the fifth diode is connected to a positive electrode of the fourth diode, and a positive electrode of the fifth diode is connected to the ground port, the method further comprising: and connecting the first output and output port with the output port of the integrated circuit so that the electrostatic protection circuit performs electrostatic protection on the integrated circuit.
6. The method of claim 5, wherein the first diode is a gated diode, the second diode is a gated diode, the third diode is a gated diode, the fourth diode is a gated diode, and the fifth diode is a gated diode.
7. The method of claim 3, wherein the electrostatic protection circuit further comprises a third resistor, the method further comprising: And the first end of the third resistor is connected with the grid electrode of the first N-type field effect transistor, and the second end of the third resistor is connected with the ground terminal outlet port.
8. The method of claim 1, wherein the integrated circuit further comprises a ground port, the ground outlet port comprising a first ground outlet port and a second ground outlet port, the method further comprising: And connecting the first ground terminal outlet port with the ground port of the integrated circuit, connecting the second ground terminal outlet port with the first ground terminal outlet port, and grounding the second ground terminal outlet port.

Description

Low-cost electrostatic protection method Technical Field The application relates to the technical field of integrated circuits, in particular to a low-cost electrostatic protection method. Background Along with the development of integrated circuit technology, the application of the method is wider and wider, so that the electrostatic protection of the integrated circuit is more and more important, the electrostatic protection cost of the integrated circuit is more and more concerned, the cost of the electrostatic protection is reduced, and the development of the integrated circuit is also crucial, so that the method for electrostatic protection with lower cost is provided, and the research focus of the technicians in the field is achieved. In addition, with the development of integrated circuit technology, new material integrated circuits have become a great trend of integrated circuit development, and the substrate materials of the new material integrated circuits are different from those of silicon-based integrated circuits, so that the new material integrated circuits have more excellent performance compared with the silicon-based integrated circuits, and become a new generation for improving the running speed of computers and reducing the power consumption of electronic equipment. However, these new material integrated circuits are generally very sensitive to electrostatic pulses, and are prone to electrostatic damage, and because of some limitations in the substrate material characteristics, the electrostatic protection design of the existing integrated circuits cannot be realized, so that effective electrostatic protection cannot be performed on the integrated circuits, so that in practical applications of the integrated circuits, functional failure of the integrated circuits is easily caused due to electrostatic damage. Therefore, it is an important point of research for those skilled in the art to provide a method for protecting the novel material integrated circuit from static electricity. Disclosure of Invention In order to solve the technical problems, the embodiment of the application provides a low-cost electrostatic protection method, which is used for carrying out electrostatic protection on an integrated circuit at low cost, and the electrostatic protection can also realize electrostatic protection on an electrostatic sensitive novel material integrated circuit, thereby being beneficial to ensuring the reliability of the integrated circuit and helping the development of the novel material integrated circuit. In order to solve the problems, the embodiment of the application provides the following technical scheme: A low cost electrostatic protection method comprising: providing a first chip, and arranging an integrated circuit on the first chip, wherein the integrated circuit comprises a power port; Providing a second chip, and arranging an electrostatic protection circuit on the second chip, wherein the electrostatic protection circuit comprises a power supply outlet port, a first capacitor and a ground terminal outlet port, the power supply outlet port comprises a first power supply outlet port and a second power supply outlet port, the second power supply outlet port is connected with the first power supply outlet port through a first end of the first capacitor, and a second end of the first capacitor is connected with the ground terminal outlet port; And connecting the first power supply output port with a power supply port of the integrated circuit so that the electrostatic protection circuit performs electrostatic protection on the integrated circuit. Optionally, the first chip is a carbon-based chip, and the second chip is a silicon-based chip. Optionally, the capacitance value of the first capacitor ranges from 0.05uf to 50uf, including the end point value. Optionally, the electrostatic protection circuit further comprises a second capacitor and a first N-type field effect transistor, wherein the second capacitor and the first N-type field effect transistor are arranged between the second power supply output port and the first end of the first capacitor, the first end of the second capacitor is connected with the drain electrode of the first N-type field effect transistor, the grid electrode of the first N-type field effect transistor is connected with the second end of the second capacitor, the source electrode of the first N-type field effect transistor is connected with the ground terminal output port, and the ground terminal output port is grounded, the method further comprises: The second power supply output port is connected with the first end of the first capacitor through the first end of the second capacitor and the drain electrode of the first N-type field effect transistor in sequence; the electrostatic protection circuit further includes a first diode, the method further comprising: And connecting the cathode of the first diode with the first power supply output port, and