CN-113990861-B - Method for inhibiting electrostatic damage of integrated circuit

CN113990861BCN 113990861 BCN113990861 BCN 113990861BCN-113990861-B

Abstract

The embodiment of the application discloses a method for inhibiting electrostatic damage of an integrated circuit, which comprises the steps of providing a first chip, arranging the integrated circuit on the first chip, providing a second chip, arranging an electrostatic protection circuit on the second chip, wherein the electrostatic protection circuit comprises a first output port, a second output port and a first resistor, when an electrostatic pulse flows through the first resistor, the resistance value of the first resistor is increased, and connecting the first output port with the output port of the integrated circuit, so that the electrostatic protection circuit can inhibit the electrostatic damage of the integrated circuit. And, the static protection circuit is arranged on the second chip, the integrated circuit is arranged on the first chip, so that the integrated circuit and the static protection circuit are arranged on different chips, the problem that static protection design cannot be carried out on the integrated circuit due to the limitation of a substrate material of the chip where the integrated circuit is arranged is avoided, and the static protection of the novel material integrated circuit is realized.

Inventors

LI XIAOJING
LUO JIAJUN
ZHAO FAZHAN
HAN ZHENGSHENG
ZENG CHUANBIN
GAO LINCHUN
NI TAO
WANG JUANJUAN
LI DUOLI
YAN WEIWEI
SHAN LIANG
LI MINGZHU

Assignees

中国科学院微电子研究所

Dates

Publication Date: 20260508
Application Date: 20211027

Claims (7)

1. A method of suppressing electrostatic damage to an integrated circuit, comprising: Providing a first chip, and arranging an integrated circuit on the first chip, wherein the integrated circuit comprises an output port; Providing a second chip, and arranging an electrostatic protection circuit on the second chip, wherein the electrostatic protection circuit comprises an output port and a first resistor, the output port comprises a first output port and a second output port, the second output port is connected with the first output port through the first resistor, the first end of the first resistor is connected with the first output port, and the second end of the first resistor is connected with the second output port, wherein electrostatic pulses flow in from the second output port and flow through the first resistor, and the resistance value of the first resistor is increased; Connecting the first output port with the output port of the integrated circuit, so that the electrostatic protection circuit performs electrostatic protection on the integrated circuit; The first chip is a carbon-based chip, and the second chip is a silicon-based chip.
2. The method of claim 1, wherein the electrostatic protection circuit further comprises a first diode, a capacitor, a first N-type field effect transistor, and a ground termination output port, wherein the first diode cathode is connected to the first capacitor end through the first N-type field effect transistor drain, wherein the first N-type field effect transistor gate is connected to the second capacitor end, wherein the source is connected to the ground termination output port, and wherein the ground termination output port is grounded, the method further comprising: The positive electrode of the first diode is respectively connected with the second end of the first resistor and the second output and output port, so that the second output and output port is connected with the second end of the first resistor through the positive electrode of the first diode; the electrostatic protection circuit further includes a second diode, the method further comprising: And connecting the cathode of the second diode with the anode of the first diode, and connecting the anode of the second diode with the ground terminal outlet port.
3. The method of claim 2, wherein the integrated circuit further comprises an input port, the electrostatic protection circuit further comprises an input-output port, a third diode, and a fourth diode, wherein the input-output port comprises a first input-output port and a second input-output port, the second input-output port is connected to the first input-output port through a third diode anode, the third diode cathode is connected to the first end of the capacitor, the fourth diode cathode is connected to the third diode anode, and the anode is connected to the ground-output port; The electrostatic protection circuit further comprises a second resistor and a second N-type field effect transistor, wherein a first end of the second resistor is connected with the first input/output port, a second end of the second resistor is connected with the positive electrode of the third diode, a drain electrode of the second N-type field effect transistor is connected with the first end of the second resistor, and a source electrode of the second N-type field effect transistor is respectively connected with a grid electrode of the second N-type field effect transistor and the ground terminal output port; The method further comprises the steps of: And connecting the first input/output port with the input port of the integrated circuit so that the electrostatic protection circuit performs electrostatic protection on the integrated circuit.
4. The method of claim 3, wherein the integrated circuit further comprises a power port, the electrostatic protection circuit further comprising a power output port, a fifth diode, wherein the power output port comprises a first power output port and a second power output port, the first power output port is connected to the first N-type FET drain, the second power output port is connected to the third diode cathode, the fifth diode cathode is connected to the first power output port, and the anode is connected to the ground output port, the method further comprising: And connecting the first power supply output port with a power supply port of the integrated circuit so that the electrostatic protection circuit performs electrostatic protection on the integrated circuit.
5. The method of claim 4, wherein the first diode is a gated diode, the second diode is a gated diode, the third diode is a gated diode, the fourth diode is a gated diode, and the fifth diode is a gated diode.
6. The method of claim 2, wherein the electrostatic protection circuit further comprises a third resistor, the method further comprising: And the first end of the third resistor is connected with the grid electrode of the first N-type field effect transistor, and the second end of the third resistor is connected with the ground terminal outlet port.
7. The method of claim 2, wherein the integrated circuit further comprises a ground port, the ground outlet port comprising a first ground outlet port and a second ground outlet port, the method further comprising: And connecting the first ground terminal outlet port with the ground port of the integrated circuit, connecting the second ground terminal outlet port with the first ground terminal outlet port, and grounding the second ground terminal outlet port.

Description

Method for inhibiting electrostatic damage of integrated circuit Technical Field The present application relates to the field of integrated circuits, and in particular, to a method for suppressing electrostatic damage of an integrated circuit. Background With the development of integrated circuit technology, new material integrated circuits have become the focus of research by researchers, and the substrate materials of the new material integrated circuits are different from those of silicon-based integrated circuits, so that the new material integrated circuits have more excellent performance compared with the silicon-based integrated circuits, and become a new generation for improving the running speed of computers and reducing the power consumption of electronic equipment. However, these new material integrated circuits are generally very sensitive to electrostatic pulses, and are prone to electrostatic damage, and because of some limitations in the substrate material characteristics, the electrostatic protection design of the existing integrated circuits cannot be realized, so that effective electrostatic protection cannot be performed on the integrated circuits, so that in practical applications of the integrated circuits, functional failure of the integrated circuits is easily caused due to electrostatic damage. Therefore, it is an important point of research by those skilled in the art to provide an electrostatic protection method capable of suppressing the occurrence of electrostatic damage in the above-mentioned novel material integrated circuit. Disclosure of Invention In order to solve the technical problems, the embodiment of the application provides a method for inhibiting electrostatic damage of an integrated circuit, and the electrostatic protection method can inhibit electrostatic damage of an electrostatic sensitive novel material integrated circuit and is beneficial to development of the novel material integrated circuit. In order to solve the problems, the embodiment of the application provides the following technical scheme: A method of suppressing electrostatic damage to an integrated circuit, comprising: Providing a first chip, and arranging an integrated circuit on the first chip, wherein the integrated circuit comprises an output port; Providing a second chip, and arranging an electrostatic protection circuit on the second chip, wherein the electrostatic protection circuit comprises an output port and a first resistor, the output port comprises a first output port and a second output port, the second output port is connected with the first output port through the first resistor, the first end of the first resistor is connected with the first output port, and the second end of the first resistor is connected with the second output port, wherein electrostatic pulses flow in from the second output port and flow through the first resistor, and the resistance value of the first resistor is increased; and connecting the first output and output port with the output port of the integrated circuit, so that the electrostatic protection circuit performs electrostatic protection on the integrated circuit. Optionally, the first chip is a carbon-based chip, and the second chip is a silicon-based chip. Optionally, the electrostatic protection circuit further comprises a first diode, a capacitor, a first N-type field effect transistor, and a ground terminal outlet port, wherein the negative electrode of the first diode is connected with the first end of the capacitor through the drain electrode of the first N-type field effect transistor, the grid electrode of the first N-type field effect transistor is connected with the second end of the capacitor, the source electrode is connected with the ground terminal outlet port, and the ground terminal outlet port is grounded, the method further comprises: The positive electrode of the first diode is respectively connected with the second end of the first resistor and the second output and output port, so that the second output and output port is connected with the second end of the first resistor through the positive electrode of the first diode; the electrostatic protection circuit further includes a second diode, the method further comprising: And connecting the cathode of the second diode with the anode of the first diode, and connecting the anode of the second diode with the ground terminal outlet port. Optionally, the integrated circuit further comprises an input port, an output port, a third diode and a fourth diode, wherein the input port comprises a first input port and a second input port, the second input port is connected with the first input port through the positive pole of the third diode, the negative pole of the third diode is connected with the first end of the capacitor, the negative pole of the fourth diode is connected with the positive pole of the third diode, and the positive pole of the fourth diode is connected with the ground termi