CN-114256152-B - Manufacturing method of semiconductor device

CN114256152BCN 114256152 BCN114256152 BCN 114256152BCN-114256152-B

Abstract

The invention discloses a manufacturing method of a semiconductor device, which relates to the technical field of semiconductor manufacturing and aims to increase the top width of an active area of the semiconductor device. The manufacturing method of the semiconductor device comprises the steps of providing a substrate, forming a patterned hard mask layer on the substrate, wherein the patterned hard mask layer is provided with at least one groove, and filling the at least one groove with a semiconductor material to form an active region. The manufacturing method of the semiconductor device provided by the invention is used for manufacturing the semiconductor device.

Inventors

GUO BINGRONG
HU YANPENG
LU YIHONG

Assignees

中国科学院微电子研究所
真芯(北京)半导体有限责任公司

Dates

Publication Date: 20260505
Application Date: 20200924

Claims (9)

1. A method of fabricating a semiconductor device, comprising: Providing a substrate; Forming a patterned hard mask layer on the substrate, the patterned hard mask layer having at least one trench and a light shielding portion; Filling the at least one groove with a semiconductor material, removing filling parts outside the groove, and processing the filling parts in the groove to form an active region, wherein the width of the top of the active region formed by filling the groove is larger than or equal to the design size; And after forming an active region, removing the shading part of the patterning hard mask layer to release the active region.
2. The method of fabricating a semiconductor device of claim 1, wherein forming a patterned hard mask layer on the substrate comprises: Forming a hard mask material layer on the substrate; and processing the hard mask material layer to form the patterned hard mask layer.
3. The method of fabricating a semiconductor device of claim 1, wherein forming a patterned hard mask layer on the substrate comprises: Sequentially forming a hard mask material layer and a photoresist layer on the substrate from bottom to top; processing the photoresist layer to form a photoresist pattern; and under the shielding of the photoresist pattern, processing the hard mask material layer to form the patterned hard mask layer.
4. The method for manufacturing a semiconductor device according to claim 2 or 3, wherein the material of the hard mask material layer is one or more of silicon oxide, silicon nitride, and amorphous carbon.
5. The method of fabricating a semiconductor device according to claim 2 or 3, wherein processing the hard mask material layer to form the patterned hard mask layer comprises: And processing the hard mask material layer by adopting a wet etching or dry etching mode to form the patterning hard mask layer.
6. The method of fabricating a semiconductor device of claim 1, wherein filling the at least one trench with a semiconductor material, forming an active region comprises: Filling the at least one trench with a polysilicon material to obtain a polysilicon filling portion; thermally treating the polysilicon filling part to form a monocrystalline silicon filling part; and processing the monocrystalline silicon filling part to form an active region.
7. The method of manufacturing a semiconductor device according to claim 6, wherein processing the single crystal silicon filling portion, forming an active region comprises: and carrying out ion doping on the monocrystalline silicon filling part to form the active region.
8. The method of fabricating a semiconductor device of claim 1, wherein filling the at least one trench with a semiconductor material, forming an active region comprises: And filling the at least one groove with a doped semiconductor material to form an active region.
9. The method of fabricating a semiconductor device of claim 1, wherein filling the at least one trench with a semiconductor material, forming an active region comprises: and filling the at least one groove by adopting an epitaxial growth process or a deposition process to form an active region.

Description

Manufacturing method of semiconductor device Technical Field The invention relates to the technical field of semiconductor manufacturing, in particular to a manufacturing method of a semiconductor device. Background In the fabrication of semiconductor devices, active regions are typically fabricated on a wafer. The active region is typically formed using an etching process. However, as the design dimensions of semiconductor devices continue to shrink, active regions formed using conventional etching processes have a positive slope, resulting in smaller top widths of the active regions of the semiconductor devices. Disclosure of Invention The invention aims to provide a manufacturing method of a semiconductor device, which is used for increasing the top width of an active region of the semiconductor device. In order to achieve the above object, the present invention provides a method for manufacturing a semiconductor device. The manufacturing method of the semiconductor device comprises the following steps: Providing a substrate; forming a patterned hard mask layer on the substrate, the patterned hard mask layer having at least one trench; the at least one trench is filled with a semiconductor material to form an active region. Compared with the prior art, the manufacturing method of the semiconductor device provided by the invention has the advantages that the patterning hard mask layer with the groove is formed on the substrate, and then the groove is filled to form the active region. In this process, the shape and size of the trench define the shape and size of the active region. And etching the hard mask layer by adopting methods such as etching and the like to form a groove relative to an active region with narrow upper part and wide lower part formed by etching the substrate by adopting the methods such as etching and the like, and then filling the groove to form an active region with the top width larger than or equal to the design size. Based on this, the problem of reduction of the top width of the active region can be avoided, thereby increasing the contact area of the active region and the upper circuit, and reducing the contact resistance to improve the performance of the semiconductor device. Drawings The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and do not constitute a limitation on the invention. In the drawings: Fig. 1 is a schematic view of a state of a silicon substrate provided in an active region fabricated in the related art, wherein a is a schematic perspective view, and b is a schematic side view; FIG. 2 is a schematic diagram of a state of depositing a photoresist layer in an active region according to the related art, wherein a is a schematic perspective view, and b is a schematic side view; fig. 3 is a schematic view of a state of forming a photoresist pattern when an active region is fabricated in the related art, wherein a is a schematic perspective view, and b is a schematic side view; fig. 4 is a schematic view of a state of etching a silicon substrate when an active region is fabricated in the related art, wherein a is a schematic perspective view, and b is a schematic side view; Fig. 5 is a schematic diagram of a state of removing a photoresist pattern on top of an active region in the related art, wherein a is a schematic perspective diagram and b is a schematic side view; Fig. 6 is a schematic view illustrating a state of a substrate when a semiconductor device is fabricated according to an embodiment of the present invention, wherein a is a schematic perspective view, b is a schematic side view, and c is a schematic top view; Fig. 7 is a schematic diagram illustrating a state of forming a hard mask material layer and a photoresist layer when manufacturing a semiconductor device according to an embodiment of the present invention, wherein a is a schematic perspective view, b is a schematic side view, and c is a schematic top view; Fig. 8 is a schematic diagram illustrating a state of forming a photoresist pattern and a patterned hard mask layer when manufacturing a semiconductor device according to an embodiment of the present invention, wherein a is a schematic perspective view, b is a schematic side view, and c is a schematic top view; fig. 9 is a schematic diagram illustrating a state of removing the photoresist layer to form a filling portion when manufacturing a semiconductor device according to an embodiment of the present invention, wherein a is a schematic perspective view, b is a schematic side view, and c is a schematic top view; Fig. 10 is a schematic view illustrating a state of removing a filling portion except a trench when manufacturing a semiconductor device according to an embodiment of the present invention, wherein a is a schematic pe