CN-114257216-B - Two-phase third-order ring oscillator circuit, related chip and electronic device

CN114257216BCN 114257216 BCN114257216 BCN 114257216BCN-114257216-B

Abstract

The application provides a two-phase third-order ring oscillator circuit, a related chip and an electronic device, wherein the circuit comprises a ring oscillator auxiliary circuit and a ring oscillator circuit, the ring oscillator auxiliary circuit provides a reference voltage signal and an initial state signal for the ring oscillator circuit, the ring oscillator circuit comprises a first-stage gain stage circuit, a second-stage gain stage circuit, a third-stage gain stage circuit, a voltage comparator and an inverter, the first-stage gain stage circuit, the second-stage gain stage circuit and the third-stage gain stage circuit form a differential input structure so as to weaken the influence of common mode noise, the voltage comparator compares two voltages corresponding to a first node and a second node on the third-stage gain stage circuit to obtain a square wave signal, the inverter reshapes the square wave signal to obtain a clock signal CLK, the clock signal with higher precision, smaller temperature variation and higher frequency can be generated, and each gain stage adopts the differential structure input to provide good common mode rejection.

Inventors

CHEN XIN

Assignees

深圳英集芯科技股份有限公司
深圳英集芯科技股份有限公司

Dates

Publication Date: 20260421
Application Date: 20200922
Priority Date: 20200922

Claims (10)

1.A two-phase third-order ring oscillator circuit is characterized by comprising a ring oscillator auxiliary circuit and a ring oscillator circuit, wherein, The ring oscillator auxiliary circuit is used for providing a reference voltage signal Vreg and an initial state signal PD before the ring oscillator circuit starts for the ring oscillator circuit; The ring oscillator circuit comprises a first-stage gain stage circuit, a second-stage gain stage circuit, a third-stage gain stage circuit, a voltage comparator and an inverter, wherein the first-stage gain stage circuit, the second-stage gain stage circuit and the third-stage gain stage circuit are connected with each other, one end of the voltage comparator is connected with the third-stage gain stage circuit, and the other end of the voltage comparator is connected with the inverter; The voltage comparator is used for comparing two voltages corresponding to a first node and a second node on the third-stage gain stage circuit to obtain square wave signals; The inverter is used for shaping the square wave signal to obtain a clock signal CLK; the first-stage gain stage circuit, the second-stage gain stage circuit and the third-stage gain stage circuit form a differential input structure so as to reduce the influence of common-mode noise.
2. The two-phase third-order ring oscillator circuit of claim 1, wherein, The first-stage gain stage circuit comprises a first current source, a first field effect tube, a second field effect tube, a first capacitor, a second capacitor, a first resistor and a second resistor, wherein the first field effect tube is connected with the second field effect tube to serve as a differential input pair tube, a tail current source is provided by the first current source, the first resistor is connected with the first capacitor to serve as a passive load, and the second resistor is connected with the second capacitor to serve as a passive load; the second-stage gain stage circuit comprises a second current source, a third field effect tube, a fourth field effect tube, a third capacitor, a fourth capacitor, a third resistor and a fourth resistor, wherein the third field effect tube is connected with the fourth field effect tube to serve as a differential input pair tube, a tail current source is provided by the second current source, the third resistor is connected with the third capacitor to serve as a passive load, and the fourth resistor is connected with the fourth capacitor to serve as a passive load; The third-stage gain stage circuit comprises a third current source, a fifth field effect tube, a sixth field effect tube, a fifth capacitor, a sixth capacitor, a fifth resistor and a sixth resistor, wherein the fifth field effect tube is connected with the sixth field effect tube to serve as a differential input pair tube, a tail current source is provided by the third current source, the fifth resistor is connected with the fifth capacitor to serve as a passive load, and the sixth resistor is connected with the sixth capacitor to serve as a passive load.
3. A two-phase third-order ring oscillator circuit according to claim 1 or 2, characterized in that, The transfer functions of the first stage gain stage circuit, the second stage gain stage circuit, and the third stage gain stage circuit are expressed as: H(s 1 )= H(s 2 )= H(s 3 )=-A 0 /（1+s/ω 0 ) the loop gain of the ring oscillator circuit is: H(s)= -A 0 3 /（1+s/ω 0 ） 3 Wherein s1 is used to represent a first-stage gain stage circuit, s2 is used to represent a second-stage gain stage circuit, s3 is used to represent a third-stage gain stage circuit, a 0 is a low-frequency gain, s is a complex frequency, ω 0 is a bandwidth.
4. A two-phase third-order ring oscillator circuit as claimed in claim 2, wherein, The range of the reference voltage signal Vreg is: Vreg≥V P,min +V THN +{ I 1 /[μ n ·C OX ·（W/L） 1,2 ]} 1/2 + I 1 ·R 1,2 /2 Wherein μ n is electron mobility of the field effect transistor, C OX is gate oxide capacitance per unit area, (W/L) 1,2 is width to length ratio of the first field effect transistor or the second field effect transistor, R 1,2 is resistance of the first resistor or resistance of the second resistor, I 1 is current value of the first current source, V THN is threshold voltage of the N-type field effect transistor, and V P,min is minimum voltage required at two ends of the first current source; after the ring oscillator circuit is started, two points of a first node A and a second node B generate oscillation signals with 180-degree phase difference, and output voltage ranges corresponding to the first node A and the second node B are expressed as follows: Vreg-(4/5)·I 3 · R 5,6 ≤V A,B ≤Vreg-（1/5）·I 3 · R 5,6 Wherein V A,B is the output voltage corresponding to the first node a and the second node B, I 3 is the current value of the third current source, and R 5,6 is the resistance value of the fifth resistor or the resistance value of the sixth resistor.
5. The two-phase third-order ring oscillator circuit of claim 1 or 2, wherein the ring oscillator auxiliary circuit comprises a linear voltage regulator comprising: Seventeenth field effect transistor, twelfth field effect transistor, thirteenth field effect transistor, fourteenth field effect transistor, fifteenth field effect transistor, sixteenth field effect transistor, seventh resistor, eighth resistor, ninth resistor, tenth resistor, seventh capacitor and fourth current source; The grid electrode of the seventeenth field effect tube is connected with the grid electrode of the twelfth field effect tube, the source electrode of the seventeenth field effect tube is connected with a power supply, the drain electrode of the twelfth field effect tube is connected with a fourth current source through a third node, the grid electrode of the thirteenth field effect tube is connected with a first signal EN, the drain electrode of the thirteenth field effect tube is connected with the grid electrode of the fourteenth field effect tube, the drain electrode of the thirteenth field effect tube is also connected with the fourth current source and the twelfth field effect tube through the third node, the drain electrode of the fourteenth field effect tube, the second end of the seventh resistor and the first end of the eighth resistor are connected and output reference voltage signals to the ring oscillator circuit, the first end of the seventh capacitor is connected with the fourth current source through the third node, the first end of the seventh capacitor is also connected with the drain electrode of the twelfth field effect tube, the first end of the seventh resistor is connected with the second end of the seventh capacitor, the second end of the ninth resistor is connected with the drain electrode of the fifteenth field effect tube, the sixteenth end of the sixteenth field effect tube is connected with the drain electrode of the seventeenth field effect tube, and the sixteenth field effect tube is connected with the drain electrode of the fifteenth field effect tube.
6. The two-phase third-order ring oscillator circuit of claim 5, wherein, The seventeenth field effect transistor and the twelfth field effect transistor are current source loads, and the width-to-length ratio of the seventeenth field effect transistor is the same as that of the twelfth field effect transistor; The thirteenth field effect transistor is a linear voltage regulator switch, the fourteenth field effect transistor is a linear voltage regulator power transistor, and the fifteenth field effect transistor is a feedback signal input transistor; The sixteenth field effect transistor is a voltage-stabilizing MOS capacitor, and the fourth current source is a PTAT current source; the seventh capacitor and the seventh resistor form a miller compensation network, and the eighth resistor, the ninth resistor and the tenth resistor form a linear voltage regulator feedback network.
7. The two-phase third-order ring oscillator circuit of claim 6, wherein, The seventeenth field effect transistor, the twelfth field effect transistor, the fifteenth field effect transistor and the fourth current source form a pseudo-differential input operational amplifier, the seventh resistor, the ninth resistor and the tenth resistor form a resistor feedback network, and the reference voltage signal Vreg is: Vreg={[2· I 4 /（μ n ·C OX ·（W/L） 15 ）] 1/2 +V THN }·(R8+ R9+R10)/ R10 Wherein μ n is electron mobility of the field effect transistor, C OX is gate oxide capacitance per unit area, (W/L) 15 is aspect ratio of the fifteenth field effect transistor, R8 is eighth resistor, R9 is ninth resistor, R10 is tenth resistor, V THN is threshold voltage of the N-type field effect transistor, and I 4 is current value of the fourth current source; as the temperature rises, the threshold voltage of the N-type field effect transistor drops, the fourth current source adopts PTAT current to carry out voltage compensation on the drop of the threshold voltage V THN , and the deviation of the reference voltage signal Vreg along with the temperature is reduced; when the voltage difference V GS15 <V THN between the gate and the source of the fifteenth fet is not enough, the reference voltage Vreg is: Vreg=VDD- V DSAT14 Wherein VDD is the power supply voltage and V DSAT14 is the overdrive voltage of the fourteenth fet.
8. The two-phase third-order ring oscillator circuit of claim 6, wherein, The ring oscillator auxiliary circuit further comprises a seventh field effect tube, an eighth field effect tube, a ninth field effect tube, a tenth field effect tube, an eleventh field effect tube and a fifth current source, wherein the source electrode of the seventh field effect tube, the source electrode of the eighth field effect tube and the source electrode of the ninth field effect tube are connected with a power supply VDD, the grid electrode of the seventh field effect tube and the grid electrode of the eighth field effect tube are connected in series and then are connected with the fifth current source, the drain electrode of the seventh field effect tube is connected with the fifth current source, the drain electrode of the eighth field effect tube is connected with a fifth node, the drain electrode of the tenth field effect tube is connected with the fifth node, the grid electrode of the tenth field effect tube is connected with a fourth node, the grid electrode of the ninth field effect tube is connected with a first signal EN, the drain electrode of the ninth field effect tube and the grid electrode of the eleventh field effect tube are connected, and the drain electrode of the eleventh field effect tube outputs an initial state signal to the ring oscillator circuit.
9. A chip comprising a two-phase third-order ring oscillator circuit according to any one of claims 1-8.
10. An electronic device comprising a two-phase third-order ring oscillator circuit as claimed in any one of claims 1 to 8.

Description

Two-phase third-order ring oscillator circuit, related chip and electronic device Technical Field The present application relates to the field of oscillator circuits, and in particular, to a two-phase third-order ring oscillator circuit, a control method, a chip, and an electronic device. Background The oscillator circuit is often applied to an analog integrated circuit to provide a stable clock signal for a system, and in the technical field of fast charging, the fast charging chip can also provide the clock signal by adopting the oscillator circuit, and the existing clock generation circuit usually adopts a relaxation oscillator structure or a ring oscillator structure cascaded through an inverter. However, the prior art has the defects of low clock signal precision, low frequency, large temperature variation, easy noise interference and the like, and influences the working performance of the fast-charging chip. Disclosure of Invention The main objective of the present application is to provide a two-phase third-order ring oscillator circuit that eliminates common mode noise interference by introducing a differential input structure and can generate a clock signal with a higher frequency for a charging chip. Another object of the present application is to provide a control method for a two-phase third-order ring oscillator circuit, which eliminates common mode noise interference by introducing a differential input structure and can generate a clock signal with a higher frequency to be applied to a charging chip. In order to achieve the above-mentioned main object, the present application provides a two-phase third-order ring oscillator circuit, comprising a ring oscillator auxiliary circuit and a ring oscillator circuit, wherein, The ring oscillator auxiliary circuit is used for providing a reference voltage signal Vreg and an initial state signal PD before the ring oscillator circuit starts for the ring oscillator circuit; The ring oscillator circuit comprises a first-stage gain stage circuit, a second-stage gain stage circuit, a third-stage gain stage circuit, a voltage comparator and an inverter, wherein the first-stage gain stage circuit, the second-stage gain stage circuit and the third-stage gain stage circuit are connected with each other, one end of the voltage comparator is connected with the third-stage gain stage circuit, and the other end of the voltage comparator is connected with the inverter; the first-stage gain stage circuit, the second-stage gain stage circuit and the third-stage gain stage circuit form a differential input structure so as to weaken the influence of common-mode noise; The voltage comparator P1 is used for comparing two voltages corresponding to a first node A and a second node B on the third-stage gain stage circuit to obtain square wave signals; the inverter L1 is configured to shape the square wave signal to obtain a clock signal CLK. The first-stage gain stage circuit comprises a first current source I1, a first field effect transistor M1, a second field effect transistor M2, a first capacitor C1, a second capacitor C2, a first resistor R1 and a second resistor R2, wherein the first field effect transistor M1 and the second field effect transistor M2 are connected as differential input pair tubes, a tail current source is provided by the first current source I1, the first resistor R1 is connected with the first capacitor C1 and serves as a passive load, and the second resistor R2 and the second capacitor C2 are connected and serve as a passive load; The second-stage gain stage circuit comprises a second current source I2, a third field effect tube M3, a fourth field effect tube M4, a third capacitor C3, a fourth capacitor C4, a third resistor R3 and a fourth resistor R4, wherein the third field effect tube M3 is connected with the fourth field effect tube M4 to serve as a differential input pair tube, a tail current source is provided by the second current source I2, the third resistor R3 is connected with the third capacitor C3 to serve as a passive load, and the fourth resistor R4 is connected with the fourth capacitor C4 to serve as a passive load; The third-stage gain stage circuit comprises a third current source I3, a fifth field effect transistor M5, a sixth field effect transistor M6, a fifth capacitor C5, a sixth capacitor C6, a fifth resistor R5 and a sixth resistor R6, wherein the fifth field effect transistor M5 is connected with the sixth field effect transistor M6 to serve as a differential input pair tube, a tail current source is provided by the third current source I3, the fifth resistor R5 is connected with the fifth capacitor C5 to serve as a passive load, and the sixth resistor R6 is connected with the sixth capacitor C6 to serve as a passive load. Optionally, transfer functions of the first stage gain stage circuit, the second stage gain stage circuit, and the third stage gain stage circuit are respectively expressed as: H(s1)＝H(s2)＝H(s3)＝-A0/(1+s