CN-114282168-B - Numerical value statistical system and numerical value statistical method

Abstract

The application provides a numerical value statistical method and a numerical value statistical system for executing the method. The numerical value statistics system transmits data to be counted to a first arithmetic unit, and the first arithmetic unit comprises a plurality of arithmetic circuits and an addition circuit. The plurality of comparison circuits receive the data to be counted in parallel and output comparison results, the comparison results are transmitted to the plurality of addition circuits, and the plurality of addition circuits output sum data. And the data are transmitted to a second arithmetic unit for accumulation, and the accumulation result is stored in a memory to finish the statistics of the data.

Inventors

• Request for anonymity
• Request for anonymity
• Request for anonymity
• Request for anonymity

Assignees

• 中科寒武纪科技股份有限公司

Dates

Publication Date

20260505

Application Date

20200927

Claims (20)

1. 1. A numerical statistical system comprising a first operator, the first operator comprising at least N operational circuits, N being a positive integer, wherein each of the operational circuits comprises: n comparators receiving n input data at run-time, where n is an integer greater than 1, each of the comparators at run-time: Receiving corresponding input data and at least one corresponding reference data, wherein the reference data received by each operation circuit is different in value, and the first operation unit is further used for multiplexing the input data so as to count a plurality of the reference data; When the corresponding input data and the corresponding reference data meet the preset condition, the output data of the comparator is a first value, otherwise, the output data is a second value, wherein the n comparators output the respective output data to an addition circuit when the first arithmetic unit operates, the n comparators are connected with the addition circuit in parallel relation with each other, and An adder circuit operable to add and sum n output data of the n comparators, and output the sum data; The adder circuit comprises a plurality of adders which are connected in a tree structure; The tree structure comprises m leaf node adders and a root node adder, wherein m is a positive integer; The output end of each of the n comparators is respectively connected with one input end of the m leaf node adders, and The output end of the root node adder outputs the sum data; The system also comprises a second arithmetic unit which is connected with the first arithmetic unit, and the second arithmetic unit is used for operating: Receiving the sum data respectively output by said N arithmetic circuits and And adding the sum data respectively output by the N operation circuits and corresponding accumulated data.
2. 2. The numerical statistical system of claim 1, wherein the n comparators receive the n input data and/or the at least one reference data in parallel at run-time.
3. 3. The numerical statistical system of claim 1, wherein the n comparators are connected in parallel relationship with each other with the adder circuit; The adder circuit includes at least n adders connected in series with each other, and The output data of each of the n comparators is input to the input of one of the n adders, respectively.
4. 4. The numerical statistical system of claim 1, wherein the second operator is operative to add the sum data respectively output by the N operational circuits to the accumulated data in parallel.
5. 5. The numerical statistical system of claim 1, wherein the second operator comprises at least K accumulation circuits corresponding to the N operation circuits, wherein K is a natural number, each of the accumulation circuits comprising at least: An adder, comprising: A first input for receiving said data, a second input for receiving said accumulated data, The output end outputs updated accumulated data, and the updated accumulated data is the sum of the sum data and the accumulated data; and a memory for storing the updated accumulated data.
6. 6. The numerical statistical system of claim 1, wherein the second operator comprises at least one vector accumulation circuit, the vector accumulation circuit comprising: n adders corresponding to the N arithmetic circuits, each of the adders including a first input terminal receiving the sum data of the corresponding arithmetic circuit, A second input terminal for receiving the corresponding accumulated data, and The output end outputs updated accumulated data, and the updated accumulated data is the sum of the sum data and the corresponding accumulated data; a vector synthesis circuit for receiving N pieces of updated accumulated data outputted from the N adders in parallel and synthesizing the N pieces of updated accumulated data into one accumulated vector; a memory, comprising: An input terminal for receiving the accumulated vector, and And the output end is used for respectively inputting the N updated accumulated data in the accumulated vectors into the second input end of the corresponding adder.
7. 7. The numerical statistical system of claim 6, wherein the vector accumulation circuit comprises: the vector synthesis circuit receives N sum data output by the N operation circuits and synthesizes the N sum data into a sum vector; the adder includes: A first input receiving said sum vector, A second input for receiving an accumulation vector, said accumulation vector comprising said corresponding accumulation data, and The output end outputs an updated accumulation vector, and the updated accumulation vector is the sum of the sum vector and the accumulation vector; a memory, comprising: An input terminal for receiving the accumulated vector, and And an output for inputting the accumulated vector to the second input of the adder.
8. 8. The numerical statistical system of claim 1, further comprising: A memory connected to the first arithmetic unit, for storing target data including the N input data and/or for transmitting the target data to the N arithmetic circuits at run-time The memory is connected with the second arithmetic unit, stores target data in the running time and transmits the target data to the second arithmetic unit, Wherein the second operator transmits the operation result to the memory when operating.
9. 9. The numerical statistical system of claim 1, further comprising an interconnect circuit coupled to the second operator and the first operator, and operable to: Receiving target data from the second operator and transmitting the target data to the first operator; Receiving N pieces of the sum data outputted from the N arithmetic circuits in parallel and transmitting the N pieces of the sum data to the second arithmetic unit, and And splicing the N data vectors into data vectors, and transmitting the data vectors to the second arithmetic unit.
10. 10. The numerical statistical system of claim 1, wherein the second operator is operative to send corresponding N reference data to the N operational circuits, respectively, the N reference data being the same in numerical value.
11. 11. The numerical statistical system of claim 1, wherein the second operator is operative to send corresponding N reference data to the N operational circuits, respectively, the N reference data being different in numerical value.
12. 12. The numerical statistical system of claim 1, wherein the n input data comprises data for which histogram statistics are desired.
13. 13. The numerical statistical system of claim 1, wherein the n input data comprises one or more of pixel data, vector data, and matrix data of the target image.
14. 14. A numerical statistical method applied to a chip circuit, the chip circuit including N arithmetic circuits in a first arithmetic unit, each of the arithmetic circuits including an adder circuit and N comparators, N being a positive integer, N being an integer greater than 1, the numerical statistical method comprising: Receiving n input data and at least one reference data by the n comparators, each input data corresponding to one of the at least one reference data; when the first arithmetic unit operates, the n comparators output respective output data to the addition circuit, and the n comparators are connected with the addition circuit in parallel connection with each other; outputting a first numerical value through the n comparators when each input data in the n input data and the corresponding reference data meet preset conditions, otherwise outputting a second numerical value; The method comprises the steps of obtaining n pieces of output data through addition and summation of an addition circuit, outputting the sum data, wherein the addition circuit comprises a plurality of adders which are connected in a tree structure, the tree structure comprises m pieces of leaf node adders and a root node adder, m is a positive integer, the output end of each comparator in the n pieces of comparators is respectively connected with one input end of the m pieces of leaf node adders, and the output end of the root node adder outputs the sum data; the method further includes multiplexing the input data by the first operator to count a plurality of parameter data; The chip circuit further comprises a second arithmetic unit, and the numerical value statistical method further comprises the steps of: receiving N sum data, and And adding the sum data respectively output by the N operation circuits and corresponding accumulated data.
15. 15. The numerical statistical method of claim 14, wherein the receiving n input data and at least one reference data comprises: the n input data are received in parallel and/or the at least one reference data are received in parallel.
16. 16. The numerical statistical method of claim 14, wherein adding the sum data respectively output by the N arithmetic circuits to the corresponding accumulated data comprises: and adding the sum data respectively output by the N operation circuits and the accumulated data in parallel.
17. 17. The numerical statistical method of claim 14, further comprising receiving N sum data output by the N arithmetic circuits and synthesizing the N sum data into a sum vector; The adding of the sum data respectively output by the N operation circuits and the corresponding accumulated data comprises vector adding of the sum data respectively output by the N operation circuits and the corresponding accumulated data.
18. 18. The method of claim 14, further comprising sending corresponding N pieces of reference data to the N arithmetic circuits, respectively, by the second arithmetic unit, the N pieces of reference data having the same value.
19. 19. The numerical statistical method of claim 14, further comprising transmitting corresponding N reference data to the N arithmetic circuits, respectively, through the second arithmetic unit, the N reference data having different numerical values.
20. 20. The numerical statistical method of claim 14, wherein the n input data includes data requiring histogram statistics.

Description

Numerical value statistical system and numerical value statistical method Technical Field The present disclosure relates to the field of data processing, and more particularly, to a system and method for counting values. Background Big data refers to a data set which cannot be captured, managed and processed by a conventional software tool within a certain time range, and is a massive, high-growth-rate and diversified information asset which needs a new processing mode to have stronger decision-making ability, insight discovery ability and flow optimization ability. The mining and processing of data is receiving increasing attention from companies. The data carrying modes can be various modes such as pictures, words, videos, audios and the like, and one important step commonly used in data processing is to count the data. For example, gray value calculation is an important step in picture data analysis when processing image data. In the statistics of the histogram of the pixel values of the image, the histogram can be used for reflecting the distribution situation of the pixel values in the image, i.e. counting the occurrence times of different pixel values. In a typical statistical process, all possible pixel values or pixel intervals need to be traversed, and one image need to be traversed every time a pixel value is counted. Therefore, in the process, each pixel value or value space is required to be counted in sequence, the time cost is high, the pictures are required to be read for many times, a large amount of memory cost is caused, and the energy consumption cost is high. Similarly, the same problems exist when processing alphanumeric information. Therefore, it is necessary to develop a new numerical statistics system and method, which can more rapidly count gray values and text information of images and reduce energy consumption. Disclosure of Invention In order to solve the problems of high system energy consumption and low efficiency in the process of analyzing and counting data such as images, videos, characters, audios and the like, the disclosure provides a numerical value counting method and a system for executing the numerical value counting method. The system can read a plurality of target data in parallel and count the occurrence times of a certain data value in the plurality of target data in parallel. Meanwhile, the system can multiplex the plurality of target data and count the occurrence times of a plurality of data values. The numerical value statistical system provided by the disclosure effectively reduces the problems of long time consumption, high memory access cost and high energy consumption in the data analysis process of images, videos, characters, audios and the like. In one aspect, the present disclosure provides a numerical statistics system. The numerical value statistical system comprises a first arithmetic unit, wherein the first arithmetic unit at least comprises N arithmetic circuits, N is a positive integer, each arithmetic circuit comprises N comparators, N comparators are used for receiving N input data in operation, N is an integer larger than 1, each comparator is used for receiving corresponding input data and at least one corresponding reference data in operation, when the corresponding input data and the corresponding reference data meet the preset condition, the output data of the comparators are first numerical values, otherwise, the output data are second numerical values, and an adding circuit is used for adding and summing the N output data of the N comparators in operation and outputting sum data. According to some embodiments of the disclosure, the n comparators receive the n input data and/or the at least one reference data in parallel at runtime. According to some embodiments of the disclosure, the n comparators output respective output data to the adder circuit when the first operator is operating. According to some embodiments of the disclosure, the n comparators are connected in parallel relationship with each other with the adder circuit, the adder circuit comprises a plurality of adders connected in a tree structure, the tree structure comprises m leaf node adders and a root node adder, m is a positive integer, an output end of each of the n comparators is connected with one input end of the m leaf node adders respectively, and an output end of the root node adder outputs the sum data. According to some embodiments of the disclosure, the n comparators are connected in parallel relationship with each other with the adder circuit, the adder circuit includes at least n adders connected in series with each other, and the output data of each of the n comparators is input to an input of one of the n adders, respectively. According to some embodiments of the disclosure, the numerical statistics system further comprises a second arithmetic unit connected with the first arithmetic unit, wherein the second arithmetic unit is used for receiving sum data respec