CN-114301464-B - Sigma-Delta analog-to-digital converter with aliasing suppression function

CN114301464BCN 114301464 BCN114301464 BCN 114301464BCN-114301464-B

Abstract

The invention discloses a Sigma-Delta analog-to-digital converter with an aliasing suppression function, which comprises a preset loop filter module, a sampling module, a quantizer and a preset feedback DAC module, wherein the preset loop filter module, the sampling module and the quantizer are sequentially connected in series, the preset loop filter module comprises a chopper, the preset feedback DAC module is connected between the loop filter module and the quantizer to suppress aliasing introduced by the chopper and maintain effective signals sampled into corresponding frequency bands by the sampling module, and all poles of a transfer function of the preset feedback DAC module are positioned at the aliasing introduced by the chopper to achieve the function effect of aliasing suppression.

Inventors

LIANG JUNHAO
ZHAO WEIBING

Assignees

珠海一微半导体股份有限公司

Dates

Publication Date: 20260505
Application Date: 20211229

Claims (13)

1. The Sigma-Delta analog-to-digital converter with the aliasing suppression function is characterized by comprising a preset loop filter module, a sampling module, a quantizer and a preset feedback DAC module; The preset loop filtering module, the sampling module and the quantizer are sequentially connected in series; The preset loop filtering module comprises a chopper; the preset feedback DAC module is connected between the loop filtering module and the quantizer to inhibit aliasing introduced by the chopper; All poles of a transfer function of a preset feedback DAC module are positioned at aliasing positions introduced by a chopper; the preset feedback DAC module comprises an interpolation filter, a modulator and a preset filter, wherein the interpolation filter, the modulator and the preset filter are sequentially connected; The preset filter is used for performing periodic extension processing on the signals output by the modulator so that a denominator polynomial of a transfer function of the preset feedback DAC module forms an expansion of the order power of the preset filter; wherein, the order of the interpolation filter and the order of the preset filter are m-1; The transfer function of the preset feedback DAC module is a ratio relation between an output signal of the preset feedback DAC module and an input signal of the preset feedback DAC module in a frequency domain; the preset loop filtering module comprises an N-stage integrator and a chopper; the preset loop filtering module is divided into a first chopping sub-module and a loop filtering sub-module; The first chopping submodule comprises a first-stage integrator and a chopper which are connected; the loop filtering sub-module comprises a second-stage integrator to an Nth-stage integrator; the integrators exist in the preset loop filtering module in a cascade connection mode, the input end of each integrator is connected with a corresponding summation node, and one integrator corresponds to one summation node.
2. The Sigma-Delta analog-to-digital converter of claim 1, wherein the preset feedback DAC module is an m-1 order feedback DAC module, and the pole frequency of the transfer function of the preset feedback DAC module is equal to an integer multiple of the ratio of the sampling frequency to m, such that the pole frequency of the transfer function of the preset feedback DAC module is equal to the aliasing frequency introduced by the chopper, or all poles of the transfer function of the preset feedback DAC module are located in the frequency aliasing interval introduced by the chopper; wherein m is a positive integer; the number of taps of the filter arranged in the preset feedback DAC module is m.
3. Sigma-Delta analog-to-digital converter according to claim 2, characterized in that the chopper chopping frequency is equal to the ratio of the sampling frequency to m times 2; the chopping frequency of the chopper is the chopper frequency used in the chopping process of the chopper in the Sigma-Delta analog-to-digital converter, and is used for shifting the flicker noise, so that the flicker noise is shifted out of the signal frequency band.
4. The Sigma-Delta analog-to-digital converter of claim 2, wherein said preset filter comprises m delay cells, a coefficient matching module, and an accumulator; The m delay units are connected in series and are used for generating m digital input signals representing different delays so as to perform the cycle extension processing, wherein a first stage delay unit in the m delay units connected in series is used for inputting the signals output by the modulator; The coefficient matching module is used for providing a matched filter coefficient for each digital input signal, multiplying each digital input signal by the matched filter coefficient, and outputting a corresponding product; And the accumulator is used for adding each product output by the coefficient matching module to obtain a signal subjected to digital-to-analog conversion and filtering processing, so that the output signal of the preset filter is an analog signal, and the modulator outputs a digital signal.
5. The Sigma-Delta analog-to-digital converter of claim 1, wherein the preset feedback DAC module is connected between an input end of a summing node corresponding to the first-stage integrator and an output end of the quantizer, and the preset feedback DAC module is configured to perform a period extension process on the quantized output signal output by the quantizer and convert the quantized output signal into a first feedback signal, and then transmit the first feedback signal to the input end of the summing node corresponding to the first-stage integrator.
6. The Sigma-Delta analog-to-digital converter of claim 1, further comprising a compensation feedback circuit; The compensation feedback circuit is connected between a summing node corresponding to the last-stage integrator and the output end of the quantizer, and is used for compensating the preset loop filter module so that a noise transfer function of the preset loop filter module is recovered; The compensation feedback circuit comprises a feedback DAC, and is used for receiving the quantized output signal output by the quantizer, converting the quantized output signal into a second feedback signal, and transmitting the second feedback signal to a summing node corresponding to the last-stage integrator.
7. The Sigma-Delta analog-to-digital converter of claim 5, wherein said first stage integrator comprises a first operational amplifier, said chopper comprises an input chopper and an output chopper; the input chopper is connected to the input end of the first operational amplifier, and the output chopper is connected to the output end of the first operational amplifier and used for reducing flicker noise generated by the first operational amplifier.
8. The Sigma-Delta analog-to-digital converter of claim 7, wherein a first stage summing node corresponding to said first stage integrator is provided with a first input, a second input and an output; The first input end of the first-stage summing node is used for receiving an analog input signal, and the second input end of the first-stage summing node is used for receiving a first feedback signal output by the preset feedback DAC module; the output end of the first-stage summing node is used for outputting a first-stage summing analog signal to the input chopper; the first-stage summing node is used for summing the analog signal and a first feedback signal provided by the preset feedback DAC module, and the sum value is configured as the first-stage summed analog signal.
9. The Sigma-Delta analog-to-digital converter of claim 8, wherein said first chopping sub-module further comprises a first branch resistor and a second branch resistor; the output end of the first branch resistor is configured as the output end of the first-stage summing node; The input of the second branch resistor is configured as the second input of the first stage summing node, and the output of the second branch resistor is configured as the output of the first stage summing node.
10. The Sigma-Delta analog-to-digital converter of claim 5, wherein said loop filter sub-module comprises an N-1 stage summing node, an N-1 stage integrator and a final operational amplifier, wherein said N-1 stage integrator comprises a second stage integrator to an nth stage integrator corresponding in sequence to said second stage summing node to said nth stage summing node, wherein said nth stage integrator is the last stage integrator, and wherein each stage summing node has a first input, a second input and an output; the output end of the last-stage integrator is connected with the input end of the last-stage operational amplifier, the output end of the last-stage operational amplifier is connected with the input end of the sampling module, and the output end of the last-stage operational amplifier is used for outputting a pre-feedback analog signal; The first input end of the ith summing node is connected with the output end of the ith-1 level integrator, the first input end of the ith summing node is used for receiving the ith-1 level integral analog signal output by the ith-1 level integrator, the second input end of the ith summing node is connected with the output end of the final operational amplifier, the second input end of the ith summing node is used for receiving the prefeedback analog signal output by the final operational amplifier, the output end of the ith summing node is connected with the input end of the ith level integrator, and the output end of the ith summing node is used for outputting the ith summing analog signal to the input end of the ith level integrator, wherein the ith summing analog signal is the sum of the ith-1 level integral analog signal and the prefeedback analog signal output by the final operational amplifier; The ith integrator is used for integrating the ith summation analog signal and outputting an ith integration analog signal; the i-1-stage integrator is used for integrating the output signal of the i-1-stage summing node to obtain the i-1-stage integrated analog signal; wherein, N is a positive integer, i is an integer greater than 1, and i is an integer less than or equal to N-1; Wherein each integrator is a continuous-time structure for integrating the input signal via the continuous-time structure.
11. The Sigma-Delta analog-to-digital converter of claim 10, wherein the nth summing node has N-1 preset inputs in addition to the first input and the second input; In the first-stage summing node to the N-1 th-stage summing node, the signal input to the first input end of each stage of summing node is further configured to be input to a corresponding preset input end in the N-th stage of summing node; The first input end of the nth stage summing node is connected with the output end of the nth-1 stage integrator, and is used for receiving the nth-1 stage integrated analog signal output by the nth-1 stage integrator; The output end of the nth summing node is used for outputting an nth summing analog signal to an nth integrator, wherein the nth summing node is used for summing the nth-1 th integrating analog signal, a feedback signal used for compensating the preset loop filtering module and a signal input by each preset input end, and the sum value is configured as the nth summing analog signal; And the nth stage integrator is used for receiving and integrating the nth stage summation analog signal to obtain an nth stage integration analog signal.
12. The Sigma-Delta analog-to-digital converter of claim 11, wherein within said loop filter sub-module, the interior of each stage integrator comprises a preconfigured op-amp, the input of the preconfigured op-amp setting being configured to correspond to the input of a stage summing node, the output of the preconfigured op-amp setting being configured to correspond to the output of a stage summing node; the branch resistor is divided into a first preset resistor and a second preset resistor; The output end of a first preset resistor in the first-stage integrator is connected with the input end of a preset operational amplifier in the first-stage integrator, and the input end of a second preset resistor in the first-stage integrator is configured as a second input end of a first-stage summing node; the output end of the first preset resistor in the last integrator is connected with the input end of the preset operational amplifier in the last integrator, and the input end of the second preset resistor in the last integrator is configured as the second input end of the last summing node.
13. The Sigma-Delta analog-to-digital converter of claim 10, wherein N is a value of 3; when the quantization bit number of the quantizer is set to be a value of 1, the quantizer is used for quantizing the analog signal sampled by the sampling module into a single-bit digital signal; The preset feedback DAC module is used for converting a 1-bit digital signal output by the quantizer into an analog signal for suppressing aliasing introduced by the chopper.

Description

Sigma-Delta analog-to-digital converter with aliasing suppression function Technical Field The invention belongs to the technical field of analog-to-digital converters (ADC) and digital-to-analog converters (DAC), and particularly relates to a Sigma-Delta analog-to-digital converter with an aliasing suppression function. Background Sigma-Delta analog-to-digital converters, also known as Delta Sigma (SIGMA DELTA) analog-to-digital converters, mainly employ over-sampling techniques and noise shaping techniques in the processing of audio signals with high accuracy. The basic structure of a sigma-delta analog-to-digital converter comprises a loop filter, a quantizer and a feedback DAC, which together form a feedback loop. Typically, the Sigma-Delta analog-to-digital converter operates at a much higher rate than the bandwidth of the analog input signal to provide oversampling, the analog input is differentially (Delta) compared to the feedback signal (error signal), the difference signal resulting from this comparison is fed into a loop filter, and the Sigma-Delta analog-to-digital converter operates by feedback to zero this difference to reduce the nonlinearity of the feedback DAC. The 1/f noise is called flicker noise or excessive noise, and is characterized in that the noise power spectral density is inversely proportional to the frequency, and mainly occurs in a low frequency region below 1 kHz. In the prior art, a chopper is used in a Sigma-Delta analog-to-digital converter to reduce 1/f noise generated by an operational amplifier, and the frequency of the chopper is used for performing frequency shifting operation on an input signal of the operational amplifier, so that after the input signal is modulated by the chopper (the operational amplifier is chopped), the 1/f noise is offset out of a signal frequency band, possibly offset out of a baseband, and the 1/f noise of the whole circuit is reduced. However, after the chopper is used in the continuous Sigma-Delta analog-to-digital converter, the chopper introduces aliasing, the high-frequency sampling signal and the low-frequency sampling signal overlap, the frequency spectrum overlaps, and thus distortion is generated, so that the basic function of a filter arranged in the continuous Sigma-Delta analog-to-digital converter is destroyed. Disclosure of Invention In order to solve the problem of aliasing introduced into the Sigma-Delta analog-to-digital converter, the invention discloses a Sigma-Delta analog-to-digital converter with an aliasing suppression function, which is used for suppressing the aliasing introduced into a related operational amplifier structure by a chopper in a time extending manner by improving a feedback DAC in a feedback loop, reducing the interference of the aliasing on the sampling filtering function of the Sigma-Delta analog-to-digital converter and ensuring the signal conversion precision of the Sigma-Delta analog-to-digital converter. The specific technical scheme is as follows: The Sigma-Delta analog-to-digital converter with the aliasing suppression function comprises a preset loop filter module, a sampling module, a quantizer and a preset feedback DAC module, wherein the preset loop filter module, the sampling module and the quantizer are sequentially connected in series, the preset loop filter module comprises a chopper, the preset feedback DAC module is connected between the loop filter module and the quantizer to suppress aliasing introduced by the chopper, the sampling module samples effective signals and is subjected to quantization processing by the quantizer, and all poles of a transfer function of the preset feedback DAC module are positioned at the aliasing introduced by the chopper. Further, the preset feedback DAC module is an m-1 order feedback DAC module, the pole frequency of the transfer function of the preset feedback DAC module is equal to the integer multiple of the ratio of the sampling frequency to m, so that the pole frequency of the transfer function of the preset feedback DAC module is equal to the aliasing frequency introduced by the chopper, or all poles of the transfer function of the preset feedback DAC module are located in the frequency aliasing interval introduced by the chopper, wherein m is a positive integer, and the number of taps of a filter arranged inside the preset feedback DAC module is m. Further, the chopping frequency of the chopper is equal to the ratio of the sampling frequency to m which is 2 times the sampling frequency of the sampling module, and the chopping frequency of the chopper is the chopper frequency used in the process of chopping in the Sigma-Delta analog-to-digital converter and is used for shifting the flicker noise so that the flicker noise is shifted out of the signal frequency band. The preset feedback DAC module comprises an interpolation filter, a modulator and a preset filter, wherein the interpolation filter, the modulator and the preset filter are sequentially