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CN-114389617-B - Analog-to-digital converter and memory device including the same

CN114389617BCN 114389617 BCN114389617 BCN 114389617BCN-114389617-B

Abstract

The application relates to an analog-to-digital converter and a memory device including the same. The present disclosure relates to electronic devices. An analog-to-digital converter includes an input voltage provider configured to output an input voltage during a plurality of phases, a comparator configured to output a comparison result between the input voltage and one of a plurality of comparison reference voltages, a successive approximation register configured to output at least one bit of a plurality of bits of digital data based on the comparison result, and a digital-to-analog converter configured to provide the one of the plurality of comparison reference voltages to the comparator based on the at least one bit, wherein the digital-to-analog converter includes a plurality of transistors coupled in parallel with each other, the digital-to-analog converter configured to selectively receive the plurality of reference voltages to generate the one comparison reference voltage.

Inventors

  • Quan Zangen

Assignees

  • 爱思开海力士有限公司
  • 爱思开海力士有限公司

Dates

Publication Date
20260421
Application Date
20210727
Priority Date
20201005

Claims (20)

  1. 1. An analog-to-digital converter that outputs digital data corresponding to a comparison result between an input voltage, which is an analog signal, and a plurality of comparison reference voltages, the analog-to-digital converter comprising: an input voltage provider that outputs the input voltage during a plurality of phases; a comparator that outputs a comparison result between the input voltage and one of the plurality of comparison reference voltages; A successive approximation register outputting at least one bit among a plurality of bits of the digital data based on the comparison result, and A digital-to-analog converter that provides one of the plurality of comparison reference voltages to the comparator based on the at least one bit, Wherein the digital-to-analog converter includes a plurality of transistors coupled in parallel with each other, the digital-to-analog converter selectively receiving a plurality of reference voltages to generate the one comparison reference voltage, Wherein the area of each of the plurality of transistors is the same as each other, an Wherein the sum of the areas of the plurality of transistors is the same as the area of the transistor receiving the input voltage.
  2. 2. The analog-to-digital converter of claim 1, wherein the plurality of reference voltages is less than the plurality of comparison reference voltages.
  3. 3. The analog-to-digital converter of claim 1, wherein the number of bits is equal to a number of times the input voltage is compared to one of the plurality of comparison reference voltages.
  4. 4. The analog-to-digital converter of claim 1, wherein the successive approximation register outputs a most significant bit of the plurality of bits based on a comparison result between the input voltage and a comparison reference voltage corresponding to an intermediate value of the plurality of comparison reference voltages.
  5. 5. The analog-to-digital converter of claim 4, wherein the digital-to-analog converter provides to the comparator a comparison reference voltage corresponding to an intermediate value among comparison reference voltages of the plurality of comparison reference voltages determined based on the most significant bit.
  6. 6. The analog-to-digital converter of claim 5, wherein the comparator compares the input voltage with the comparison reference voltage corresponding to an intermediate value among comparison reference voltages determined based on the most significant bit, and Wherein the successive approximation register outputs a next bit of the most significant bit among the plurality of bits based on a comparison result between the input voltage and a comparison reference voltage corresponding to an intermediate value among comparison reference voltages determined based on the most significant bit.
  7. 7. An analog-to-digital converter, the analog-to-digital converter comprising: a digital-to-analog converter generating a plurality of comparison reference voltages from at least one reference voltage set in advance and outputting the plurality of comparison reference voltages, and A comparator having a first input terminal receiving an input voltage and a second input terminal receiving an output from the digital-to-analog converter, the comparator outputting a result of comparing a voltage of the first input terminal with a voltage of the second input terminal, Wherein the digital-to-analog converter comprises a plurality of transistors coupled in parallel with each other, the digital-to-analog converter selectively receiving the at least one reference voltage, Wherein the area of each of the plurality of transistors is the same as each other, an Wherein the sum of the areas of the plurality of transistors is the same as the area of the transistor receiving the input voltage.
  8. 8. The analog-to-digital converter of claim 7, further comprising an input voltage provider that samples the input voltage and provides the sampled input voltage to the comparator.
  9. 9. The analog-to-digital converter of claim 7, further comprising a successive approximation register outputting a portion of the digital data corresponding to the input voltage based on an output of the comparator.
  10. 10. The analog-to-digital converter of claim 9, further comprising a clock provider that provides a clock signal corresponding to a number of times the successive approximation register outputs the portion of the digital data.
  11. 11. A memory device, the memory device comprising: a memory block having a plurality of memory cells storing data; a voltage generator that generates an operating voltage for accessing the plurality of memory cells; a temperature information generator that generates a temperature code based on an internal temperature, and Control logic that controls the voltage generator to control the operating voltage based on the temperature code, Wherein the temperature information generator includes: a sensor generating a temperature voltage signal, the temperature voltage signal being an analog signal determined based on the internal temperature, and An analog-to-digital converter that converts the temperature voltage signal to a digital signal, Wherein the analog-to-digital converter comprises: a comparator that outputs a comparison result between the temperature voltage signal and one of a plurality of comparison reference voltages; a successive approximation register outputting at least one bit among a plurality of bits of the temperature code based on the comparison result, and A digital-to-analog converter that provides one of the plurality of comparison reference voltages to the comparator based on the at least one bit, Wherein the digital-to-analog converter includes a plurality of transistors coupled in parallel with each other, the digital-to-analog converter selectively receiving a plurality of reference voltages to generate the one comparison reference voltage, Wherein the area of each of the plurality of transistors is the same as each other, an Wherein the sum of the areas of the plurality of transistors is the same as the area of the transistor receiving the temperature voltage signal.
  12. 12. The memory device of claim 11, wherein the plurality of reference voltages is less than the plurality of comparison reference voltages.
  13. 13. The memory device of claim 11, wherein the number of bits is equal to a number of times the temperature voltage signal is compared to the one of the plurality of comparison reference voltages.
  14. 14. The memory device of claim 11, wherein the successive approximation register outputs a most significant bit of the plurality of bits based on a comparison result between the temperature voltage signal and a comparison reference voltage corresponding to an intermediate value of the plurality of comparison reference voltages.
  15. 15. The memory device of claim 14, wherein the digital-to-analog converter provides a comparison reference voltage to the comparator corresponding to an intermediate value among comparison reference voltages of the plurality of comparison reference voltages determined based on the most significant bit.
  16. 16. The memory device of claim 11, wherein the operating voltages include a programming voltage for storing data in the plurality of memory cells and a reading voltage for reading data stored in the plurality of memory cells.
  17. 17. The memory device of claim 16, wherein the control logic is to control the voltage generator to reduce the read voltage by a predetermined level in response to the temperature code indicating that the internal temperature is above a critical temperature.
  18. 18. The memory device of claim 16, wherein the control logic is to control the voltage generator to increase the read voltage by a predetermined level in response to the temperature code indicating that the internal temperature is below a critical temperature.
  19. 19. The memory device of claim 16, wherein the control logic is to control the voltage generator to increase the programming voltage by a predetermined level in response to the temperature code indicating that the internal temperature is above a critical temperature.
  20. 20. The memory device of claim 16, wherein the control logic is to control the voltage generator to reduce the programming voltage by a predetermined level in response to the temperature code indicating that the internal temperature is below a critical temperature.

Description

Analog-to-digital converter and memory device including the same Technical Field Various embodiments of the present invention relate generally to electronic devices and, more particularly, to analog-to-digital (analog-to-digital) converters, memory devices including analog-to-digital converters, and methods of operating the same. Background The storage device may store data in response to control of a host device such as a computer or a smart phone. The storage device may include a memory device storing data and a memory controller controlling the memory device. Memory devices can be classified into volatile memory devices and nonvolatile memory devices. Memory cells included in a memory device may have operating characteristics that vary based on temperature. The memory device may include a temperature sensor to compensate for temperature-based variations in the operating voltage. The temperature sensor of the memory device may include an analog-to-digital converter that senses a temperature as a voltage corresponding to the analog signal and converts the sensed voltage signal into a digital signal. For example, types of analog-to-digital converters may include flash analog-to-digital converters, analog-to-digital converters using tracking schemes, successive Approximation Register (SAR) analog-to-digital converters (hereinafter "SAR-ADC"), and pipelined analog-to-digital converters. Disclosure of Invention According to an embodiment, an analog-to-digital converter that outputs digital data corresponding to a comparison result between an input voltage, which is an analog signal, and a plurality of comparison reference voltages may include an input voltage provider configured to output the input voltage during a plurality of phases, a comparator configured to output a comparison result between the input voltage and one of the plurality of comparison reference voltages, a successive approximation register configured to output at least one bit of a plurality of bits of the digital data based on the comparison result, and a digital-to-analog converter configured to provide the one of the plurality of comparison reference voltages to the comparator based on the at least one bit, wherein the digital-to-analog converter includes a plurality of transistors coupled in parallel with each other, the digital-to-analog converter configured to selectively receive the plurality of reference voltages to generate the one comparison reference voltage. An analog-to-digital converter may include a digital-to-analog converter configured to generate a plurality of comparison reference voltages from at least one reference voltage set in advance and configured to output the plurality of comparison reference voltages, and a comparator having a first input terminal configured to receive an input voltage and a second input terminal to receive an output from the digital-to-analog converter, the comparator configured to output a result of comparing a voltage of the first input terminal with a voltage of the second input terminal, wherein the digital-to-analog converter includes a plurality of transistors coupled in parallel with each other, the plurality of transistors having an area in a predetermined ratio with respect to an area of the transistor receiving the input voltage, the digital-to-analog converter configured to selectively receive the at least one reference voltage. A memory device may include a memory block having a plurality of memory cells storing data, a voltage generator configured to generate an operation voltage for accessing the plurality of memory cells, a temperature information generator configured to generate a temperature code based on an internal temperature, and control logic configured to control the voltage generator based on the temperature code to control the operation voltage, wherein the temperature information generator includes a sensor configured to generate a temperature voltage signal that is an analog signal determined based on the internal temperature, and an analog-to-digital converter configured to convert the temperature voltage signal into a digital signal, wherein the analog-to-digital converter includes a comparator configured to output a comparison result between the temperature voltage signal and one of a plurality of comparison reference voltages, a successive approximation register configured to output at least one bit of the plurality of bits of the temperature code based on the comparison result, and a digital-to-analog converter configured to provide one of the plurality of comparison reference voltages to the comparator based on the at least one bit, and wherein the digital-analog-to-analog converter includes a plurality of transistors coupled in parallel to each other configured to selectively receive the one of the plurality of comparison reference voltages. Drawings FIG. 1 is a diagram illustrating a storage device according to an embodiment of the present disclosure; FIG. 2 is