CN-114400249-B - Semiconductor device and forming method thereof

Abstract

The embodiment of the disclosure discloses a semiconductor device and a forming method thereof. The semiconductor device comprises a substrate, a grid electrode, source and drain doped regions, contact plugs and isolation layers, wherein the grid electrode is arranged on the substrate, the source and drain doped regions are respectively arranged on the substrate on two sides of the grid electrode, the contact plugs are arranged on the substrate, the bottoms of the contact plugs are electrically connected with the source and drain doped regions, the isolation layers are arranged in the source and drain doped regions, the isolation layers are arranged below the contact plugs, the upper surfaces of the isolation layers are higher than the lower surfaces of the source and drain doped regions, and the isolation layers comprise insulating materials. By introducing a layer of insulating layer between the contact plug and the lower surface of the source-drain doped region, the depletion layer generated at the junction interface between the source-drain doped region and the substrate is isolated, and the distance between the depletion layer and the contact plug is increased, so that the junction interface leakage can be reduced, and the current conduction path of the device is not influenced.

Inventors

• MU KEJUN

Assignees

• 长鑫存储技术有限公司

Dates

Publication Date

20260512

Application Date

20220117

Claims (16)

1. 1. A semiconductor device, comprising: A substrate; A gate electrode on the substrate; the source-drain doped regions are respectively positioned on the substrate at two sides of the grid electrode; the contact plug is arranged on the substrate, and the bottom of the contact plug is electrically connected with the source-drain doped region; The isolation layer is arranged in the source-drain doped region, the isolation layer is positioned below the contact plug, the upper surface of the isolation layer is higher than the lower surface of the source-drain doped region, and the isolation layer comprises an insulating material; The source-drain doped region comprises a first source-drain doped region and a second source-drain doped region, wherein the second source-drain doped region is located above the first source-drain doped region, and the upper surface of the isolation layer is lower than or flush with the lower surface of the second source-drain doped region.
2. 2. The semiconductor device of claim 1, wherein a width of the isolation layer along a direction parallel to the substrate is equal to a width of the source-drain doped region along a cross section parallel to the substrate direction.
3. 3. The semiconductor device of claim 1, wherein a resistivity of the second source-drain doped region is lower than a resistivity of the first source-drain doped region.
4. 4. The semiconductor device according to claim 1, wherein the isolation layer is a cap structure including a horizontal portion extending in a direction parallel to the substrate and a vertical portion extending in a direction perpendicular to the substrate, and the vertical portion is located above the horizontal portion.
5. 5. The semiconductor device according to claim 1, wherein, The contact plug comprises a metal silicide layer and a conductive plug, wherein the metal silicide layer is positioned between the conductive plug and the source-drain doped region, and the metal silicide layer is electrically connected with the conductive plug and the source-drain doped region.
6. 6. The semiconductor device according to claim 1, wherein, The material of the isolation layer comprises silicon dioxide.
7. 7. The semiconductor device of claim 1, wherein a doping concentration of the second source-drain doped region is greater than a doping concentration of the first source-drain doped region.
8. 8. The semiconductor device of claim 1, wherein a doping concentration of the second source drain doping region decreases along a direction gradient from the upper surface to the lower surface.
9. 9. The semiconductor device of claim 1, wherein a material of the second source-drain doped region is different from a material of the first source-drain doped region.
10. 10. A method of forming a semiconductor device, comprising: Providing a substrate; Forming a gate electrode on the substrate; forming a first source-drain doped region pre-layer on the substrate at two sides of the grid electrode; oxygen ion implantation is carried out in the first source-drain doped region pre-layer, and the implantation depth of the oxygen ions is higher than the depth of the lower surface of the source-drain doped region pre-layer; Etching the first source-drain doped region pre-layer to form a groove and a first source-drain doped region positioned below the groove, wherein the lower surface of the groove is higher than the position of the maximum concentration of the implanted oxygen ions; forming a second source-drain doped region in the groove; performing a heat treatment process to enable the oxygen ions to react with the material in the first source-drain doped region so as to form an isolation layer; and forming a contact plug above the isolation layer, wherein the bottom of the contact plug is electrically connected with the second source-drain doped region.
11. 11. The forming method according to claim 10, wherein forming a contact plug over the isolation layer includes: Forming a dielectric layer on the substrate, wherein the dielectric layer covers the second source-drain doping region; etching the dielectric layer until the surface of the second source-drain doped region is exposed, and forming an opening; Etching the exposed surface of the second source-drain doped region to form a groove structure, and forming a contact hole by the opening and the groove structure; And depositing a conductive material, wherein the conductive material fills the contact hole to form a contact plug.
12. 12. The method of forming of claim 11, wherein forming a contact plug over the isolation layer comprises: forming a metal silicide layer in the groove structure; and forming a conductive plug on the metal silicide layer, wherein the conductive plug is electrically connected with the second source-drain doped region through the metal silicide layer.
13. 13. The method of forming of claim 10, wherein forming a second source drain doped region within the trench comprises: selectively epitaxially growing a second source-drain doped region material in the trench; And carrying out source-drain doping ion implantation on the second source-drain doping region material to form a second source-drain doping region.
14. 14. The method of claim 10, wherein a doping concentration of the second source-drain doped region is greater than a doping concentration of the first source-drain doped region.
15. 15. The method of claim 10, wherein the doping concentration of the second source-drain doped region decreases in a gradient along a direction from the upper surface to the lower surface.
16. 16. The method of claim 10, wherein the material of the second source drain doped region is different from the material of the first source drain doped region.

Description

Semiconductor device and forming method thereof Technical Field The present disclosure relates to the field of semiconductor technology, and in particular, to a semiconductor device and a method for forming the same. Background Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) are quite important electronic components in today's semiconductor products. The electrical performance of a MOSFET is directly related to the quality of an integrated circuit. MOSFET leakage relates to power consumption of a chip in a Standby (Standby) state, stability of a device, service life and the like, and has been a major problem for limiting development of the semiconductor industry. With the increasing integration level of devices, how to inhibit MOSFET leakage is a technical problem that needs to be solved at present. Disclosure of Invention The embodiment of the disclosure provides a semiconductor device, which comprises a substrate, a grid electrode, source and drain doping regions, a contact plug and an isolation layer, wherein the grid electrode is arranged on the substrate, the source and drain doping regions are respectively arranged on the substrate at two sides of the grid electrode, the contact plug is arranged on the substrate, the bottom of the contact plug is electrically connected with the source and drain doping regions, the isolation layer is arranged in the source and drain doping regions, the isolation layer is arranged below the contact plug, the upper surface of the isolation layer is higher than the lower surface of the source and drain doping regions, and the isolation layer comprises an insulating material. In some embodiments, the width of the isolation layer along a direction parallel to the substrate is equal to the width of the cross section of the source-drain doped region along the direction parallel to the substrate. In some embodiments, the source-drain doped region comprises a first source-drain doped region and a second source-drain doped region, wherein the second source-drain doped region is located above the first source-drain doped region and an upper surface of the isolation layer is lower than or flush with a lower surface of the second source-drain doped region. In some embodiments, the isolation layer is a cap structure comprising a horizontal portion extending in a direction parallel to the substrate and a vertical portion extending in a direction perpendicular to the substrate, and the vertical portion is located above the horizontal portion. In some embodiments, the contact plug includes a metal silicide layer and a conductive plug, the metal silicide layer is located between the conductive plug and the source-drain doped region, and the metal silicide layer electrically connects the conductive plug and the source-drain doped region. In some embodiments, the material of the isolation layer comprises silicon dioxide. The embodiment of the disclosure also provides a method for forming the semiconductor device, which comprises the steps of providing a substrate, forming a grid on the substrate, forming source-drain doped regions on the substrate at two sides of the grid, forming an isolation layer in the source-drain doped regions, wherein the upper surface of the isolation layer is higher than the lower surface of the source-drain doped regions, the isolation layer comprises an insulating material, and forming a contact plug above the isolation layer, and the bottom of the contact plug is electrically connected with the source-drain doped regions. In some embodiments, the forming the isolation layer in the source-drain doped region comprises the steps of performing oxygen ion implantation in the source-drain doped region, wherein the implantation depth of the oxygen ions is higher than the depth of the lower surface of the source-drain doped region, and performing a heat treatment process to enable the oxygen ions to react with materials in the source-drain doped region so as to form the isolation layer. In some embodiments, forming a contact plug above the isolation layer comprises forming a dielectric layer on the substrate, wherein the dielectric layer covers the source-drain doped region, etching the dielectric layer until the surface of the source-drain doped region is exposed to form an opening, etching the exposed surface of the source-drain doped region to form a groove structure, forming a contact hole by the opening and the groove structure, and depositing a conductive material, wherein the conductive material fills the contact hole to form the contact plug. In some embodiments, the forming a contact plug above the isolation layer comprises forming a metal silicide layer in the groove structure, and forming a conductive plug on the metal silicide layer, wherein the conductive plug is electrically connected with the source-drain doped region through the metal silicide layer. In some embodiments, the width of the isolation layer along a direction parallel to the su