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CN-114465460-B - Multi-target coordinated N3S-CBPWM modulation algorithm of neutral point clamped three-level inverter

CN114465460BCN 114465460 BCN114465460 BCN 114465460BCN-114465460-B

Abstract

The invention relates to a multi-target coordinated N3S-CBPWM modulation algorithm of a neutral point clamped three-level inverter, which comprehensively considers neutral point voltage balance, reduces switching loss and reduces a plurality of targets of common-mode voltage, wherein one phase is clamped in one switching period, one phase has one switching action, and the other phase has two switching actions. In addition, a method for reducing the common-mode voltage is also provided, a modulation wave constraint condition of the N3S_ CBPWM modulation algorithm based on the common-mode voltage reduction is provided, and active midpoint voltage control based on the N3S_ CBPWM modulation algorithm is also provided for realizing effective control of midpoint voltage. The modulation method provided by the invention can effectively control the balance of the midpoint voltage, reduce the switching loss of the system, reduce the common-mode voltage of injection, improve the operation efficiency of the inverter and realize the optimal control of the three-level inverter.

Inventors

  • WANG JINPING
  • Xi Dijie
  • TANG LIN
  • YUE YIMIN
  • Sun Lerun

Assignees

  • 合肥工业大学

Dates

Publication Date
20260508
Application Date
20220321

Claims (3)

  1. 1. A multi-target coordinated n3s_ CBPWM modulation algorithm for a neutral point clamped three level inverter comprising the steps of: S1, collecting upper capacitor voltage u C1 and lower capacitor voltage u C2 on the direct current side of a three-level inverter, outputting phase current i A 、i B 、i C in three phases, and sequencing the three phase output phase voltages u A 、u B 、u C according to the sizes to obtain processed data; Maximum voltage u L =max(u A ,u B ,u C ), minimum voltage u S =min(u A ,u B ,u C ) and intermediate voltage u M =mid(u A ,u B ,u C ), maximum current i L =max(i A ,i B ,i C ), minimum voltage i S =min(i A ,i B ,i C ) and intermediate voltage i M =mid(i A ,i B ,i C ); S2, respectively calculating a neutral point voltage balance modulation wave constraint condition and a common mode voltage modulation wave constraint condition reduction under a 1+1+1 mode and a 2+1+0 mode according to the processed data; The specific steps for reducing the constraint condition of the common-mode voltage modulation wave in the 1+1+1 mode and the 2+1+0 mode are as follows: S201, setting the common-mode voltage of the N3S_ CBPWM modulation algorithm as follows: (1); In the middle of And The instantaneous level generated by comparing the k-th dual-modulation wave with the carrier wave is {0,1}; S202, setting the condition that the common mode voltage is limited to +/-1/6U dc according to the formula (1) as follows: (2); s203, respectively calculating constraint conditions of reducing common-mode voltage modulation waves under a 1+1+1 mode and a 2+1+0 mode according to a formula (2), wherein the 1+1+1 mode and the 2+1+0 mode can be subdivided into eight modes according to the switching times of each phase and the polarity of a primary switching action phase, and the obtained results are shown in the following table: ; wherein u M_1 、u M_2 is the voltage of M phase 1 level and M phase 2 level, u L_1 、u L_2 is the voltage of L phase 1 level and L phase 2 level, u S_1 、u S_2 is the voltage of S phase 1 level and S phase 2 level; the midpoint voltage balance modulation wave constraint conditions under the 1+1+1 mode and the 2+1+0 mode comprise the following steps: Step S301, setting the direction from the midpoint to be the positive direction of the midpoint current, and introducing the midpoint current Active control of the midpoint voltage is achieved, wherein T s represents a switching period; Step S302, respectively calculating the constraint conditions of the midpoint voltage balance modulation waves under the 1+1+1 mode and the 2+1+0 mode: In the 1+1+1 mode, active neutral point voltage balance control is realized by injecting zero sequence voltage into the three-phase modulation wave, and the calculation formula of the injected zero sequence voltage is as follows: ; In the 2+1+0 mode, active neutral point voltage balance control is realized by injecting differential mode voltage into the secondary switching action phase, and the calculation formula of the injected differential mode voltage is as follows: ; In the middle of The current corresponding to the secondary switching action phase; And S3, obtaining a multi-target coordination control modulation algorithm of the neutral point clamped three-level inverter according to the neutral point voltage balance modulation wave constraint condition and the common mode voltage modulation wave constraint condition.
  2. 2. The multi-objective coordinated n3s_ CBPWM modulation algorithm for a neutral-point clamped three-level inverter according to claim 1, wherein the specific process of reducing the common-mode voltage modulation wave constraint in the 1+1+1 mode in step S203 is as follows: When (when) In this case, the formula (2) can be simplified as: (3); Comparing the maximum phase and the intermediate phase with the concave carrier, outputting 2-level interval when the maximum phase and the intermediate phase occur in the intermediate phase of one switching period, and Wherein d L,2 and d M,2 represent the duty cycles of the L-phase 2 level and the M-phase 2 level, respectively, when When the number of the codes is =1, 1, In order to satisfy the condition of the formula (3) When the number of the codes is =1, =0, Thereby obtaining a duty cycle constraint Where d S,2 represents the duty cycle of the S-phase 2 level, which is converted to a constraint on reducing the common mode voltage modulation wave, namely: ; When the voltage intermediate phase is compared with the convex carrier wave, the setting is set When the number of the codes is =1, =0, Duty cycle needs to be satisfied Where d L,1 denotes the duty cycle of the L-phase 1level, which is converted to reduce the common mode voltage modulation wave constraint, namely: ; When (when) Comparing the intermediate phase and the minimum phase with the concave carrier, outputting a 0 level interval when the intermediate phase and the minimum phase are the same in the intermediate phase of one switching period Wherein d S,0 and d M,0 represent the duty cycles of the S-phase 0 level and the M-phase 0 level, respectively When the value of the sum is =0, 0, In order to satisfy the condition of the formula (3) When the value of the sum is =0, =1, Thereby obtaining a reduced common mode voltage modulation wave constraint, namely: ; When the voltage intermediate phase is compared with the convex carrier wave, the setting is set When the value of the sum is =0, =1, Reducing the common mode voltage modulation wave constraint, namely: 。
  3. 3. The multi-objective coordinated n3s_ CBPWM modulation algorithm for a neutral point clamped three level inverter according to claim 2, wherein the specific process of calculating the l_pb/m_2s (u M -u S < 1) mode reducing common mode voltage modulation wave constraint in the 2+1+0 mode in step S203 is as follows: L_PB/M_2S in the mode, L_PB indicates that the maximum phase is clamped to the positive bus, M_2S indicates that the voltage intermediate phase has two switching actions, due to the fact that Clamped to 2 level, the voltage minimum phase has only one switching action, thereby simplifying equation (2) as: (4) ; Setting the duty cycle constraint to To satisfy common mode voltage constraints; converting the constraint on the duty cycle into a constraint condition for reducing common mode voltage modulation waves, namely: 。

Description

Multi-target coordinated N3S-CBPWM modulation algorithm of neutral point clamped three-level inverter Technical Field The invention belongs to the technical field of inverter modulation, and particularly relates to a multi-target coordinated N3S_ CBPWM modulation algorithm of a neutral point clamped three-level inverter. Background With the development of power electronics and power devices, neutral-point clamped three-level inverters are widely used in many applications, such as fan drives, photovoltaic systems and electric vehicles, due to their better harmonic characteristics and lower switching tube withstand voltages. The number of power tubes is increased to cause complex control algorithm, and meanwhile, the problems of switching loss, midpoint voltage offset, common mode voltage influence and the like are accompanied, midpoint voltage balance is an important index for ensuring safe and reliable operation of the converter, and offset and fluctuation of midpoint voltage not only can cause quality reduction of output voltage and current of the converter, but also can cause danger such as explosion of direct-current side capacitor caused by overhigh withstand voltage of direct-current side capacitor. Because the current generated by the common-mode voltage can consume power when flowing through the load, the common-mode voltage is very unfavorable to the load, and meanwhile, the maintenance cost of the system is increased, the long-term safe operation of the system is influenced, and the common-mode voltage is not suitable for some special occasions, so that the common-mode voltage needs to be limited in a certain range. Switching loss is one of the important indexes for measuring the efficient operation of the converter. The reduction of the switching loss can effectively prolong the service life of the power device. The imbalance of the neutral point potential of the three-level inverter includes a dc offset and an ac ripple, which may cause an overvoltage phenomenon to damage switching devices and distort an output current. Therefore, in order to ensure safe and reliable operation of the three-level inverter, a method capable of realizing midpoint voltage balance is required. Switching losses are also one of the important indicators for efficient operation of the inverter. The increase in switching loss inevitably reduces the use of the power device. The majority of the methods currently employed are to maintain midpoint voltage balance by employing different Pulse Width Modulation (PWM) strategies, which are largely divided into carrier-based PWM (CBPWM) and Space Vector PWM (SVPWM). The specific zero sequence voltage is injected into the modulated wave and then compared with the carrier wave, so that the same effect as SVPWM can be realized, and the equivalent of CBPWM and SVPWM is realized. However, classical CBPWM, SVPWM, DPWM has no way to achieve unconditional midpoint potential balance and a new approach is needed to solve this problem. A new method based on Virtual Space Vector PWM (VSVPWM) adopts a carrier-based implementation method, and the virtual vector constructed by the new method can meet the condition that the midpoint current is zero in a full range, can realize midpoint potential balance unconditionally, but can increase one switching action in a single period, thereby increasing switching loss. Meanwhile, too high common-mode voltage can generate shaft current, increase mechanical abrasion among bearings, cause electromagnetic interference, influence normal operation of other electrical equipment and the like. Therefore, it is desirable to provide a modulation method for a three-level inverter that can simultaneously reduce system switching losses, control midpoint voltage balancing, and reduce common mode voltages. Disclosure of Invention The invention aims to solve the problems, and provides a multi-objective coordinated N3S_ CBPWM modulation algorithm of a neutral point clamped three-level inverter. The invention realizes the above purpose through the following technical scheme: A multi-target coordinated n3s_ CBPWM modulation algorithm for a neutral point clamped three level inverter, comprising the steps of: S1, collecting upper capacitor voltage u C1 and lower capacitor voltage u C2 on the direct current side of a three-level inverter, outputting phase current i A、iB、iC in three phases, and sequencing the three phase output phase voltages u A、uB、uC according to the sizes to obtain processed data; S2, respectively calculating a neutral point voltage balance modulation wave constraint condition and a common mode voltage modulation wave constraint condition reduction under a 1+1+1 mode and a 2+1+0 mode according to the processed data; And S3, obtaining a multi-target coordination control modulation algorithm of the neutral point clamped three-level inverter according to the neutral point voltage balance modulation wave constraint condition and the common mode voltage modulation