CN-114513117-B - Overload protection method, shutdown protection method and circuit protection system

CN114513117BCN 114513117 BCN114513117 BCN 114513117BCN-114513117-B

Abstract

The invention discloses an overload protection method, wherein a system enters a starting mode, the working voltage is charged, whether the feedback voltage is smaller than a second voltage is judged in the first time value, a latch signal is output according to a detection result of the feedback voltage, and OLP protection is started and delay time of the OLP protection is selected according to the latch signal. The invention also discloses a shutdown protection method, the system enters a shutdown mode, the system triggers the OLP protection for the first time and waits for a debounce period for the first time, the OLP protection is delayed for a first delay time, the system triggers the OLP protection for the second time and waits for the debounce period for the second time, the first input signal is input before the debounce period waiting for the second time is ended, and the system enters normal startup. The invention also discloses a circuit protection system. The invention can avoid the false start of the OLP protection by adjusting the response time between the on-off states in the shutdown mode.

Inventors

JIN WEIXIANG
HU CHANGWEI
ZHU XIANGWEN

Assignees

深圳市必易微电子股份有限公司

Dates

Publication Date: 20260512
Application Date: 20220217

Claims (7)

1. An overload protection method, when a system enters a start-up mode, comprising the steps of: The working voltage zero clearing is finished, and the system enters a starting mode; The working voltage rises, and when the working voltage is larger than the first voltage, the soft start of the system is completed; timing a first time value and detecting feedback voltage, and judging whether the feedback voltage is smaller than a second voltage in the first time value, wherein the first time value is not larger than a debounce period; outputting a latch signal according to the detection result of the feedback voltage, and outputting the latch signal when the feedback voltage is judged to be smaller than a second voltage in the first time value; The method comprises the steps of starting OLP protection according to a latch signal, selecting delay time of the OLP protection, not starting the OLP protection when the latch signal is detected, starting the OLP protection when the latch signal is not detected, selecting second delay time by the delay time, selecting first delay time by the delay time when the latch signal is detected and the OLP protection is in a starting state, and enabling the second delay time to be larger than the first delay time; starting the OLP protection includes stopping the main power switch.
2. The overload protection method according to claim 1, wherein when load overload occurs after the system enters a start-up mode, comprising the steps of: the first input signal is input, and the system enters a starting-up mode and works normally; The overload of the load occurs, triggering the OLP protection and waiting for one of the debounce periods for the first time; starting the OLP protection after the debounce period waiting for the first time is finished and delaying the OLP protection for the first time by the first delay time; The first delay time of the first time delay is over, and the OLP protection is over.
3. The overload protection method of claim 2, wherein, when the overload of the load is not relieved after the first delay time of the first time delay is over, the method further comprises the following steps of: the overload of the load is not relieved, the OLP protection is triggered again, and one debounce period is waited again; During the re-waiting de-jittering period, when the load overload is always kept within the first time value, the delay time selects the second delay time, when the load overload occurs within the first time value, the overload is relieved, and the delay time selects the first delay time; And ending the delay time and ending the OLP protection.
4. The shutdown protection method is characterized by comprising the following steps when a system enters a shutdown mode: when the system works normally, a second input signal is input, and the system enters a shutdown mode; Triggering OLP protection for the first time and waiting for a debounce period for the first time, wherein the working voltage is reduced during the debounce period for the first time; when the debounce period is finished for the first time and the working voltage is reduced to be lower than a third voltage, the OLP protection is started, the main power switching tube is stopped, after a first input signal is input, the system is started normally, and the main power switching tube is restarted; when the debounce period is finished for the first time and the working voltage is not reduced to be lower than the third voltage, the OLP protection is started and delayed for a first delay time, and the main power switch tube is stopped and kept in a stop state within the first delay time; When the first delay time is over, the working voltage is powered down to be lower than the third voltage, the OLP protection is stopped, the main power switching tube is released from the maintained stopping state, after the first input signal is input, the system enters normal start-up, and the main power switching tube is restarted; when the first delay time is over, the working voltage does not drop below the third voltage, the system triggers the OLP protection for the second time and waits for one debounce period for the second time; When the system triggers the OLP protection for the second time and the working voltage is still higher than the third voltage at the end of the debounce period for the second time, the OLP protection of the system enters a second delay time which is longer than the first delay time, and the shutdown protection method further comprises the following steps of And before the second debounce period is finished, inputting the first input signal, enabling the system to enter a normal start-up state after the second debounce period is finished, and restarting the main power switching tube.
5. The shutdown protection method of claim 4 wherein the time difference between the second input signal and the first input signal is a response time, the response time being no greater than a sum of the first delay time and twice the debounce period, the sum of the first delay time and twice the debounce period being no greater than 500 milliseconds.
6. A circuit protection system for implementing the overload protection method of any one of claims 1-3 and the shutdown protection method of any one of claims 4-5, comprising The OLP protection module is used for starting or stopping OLP protection; The OLP protection device comprises an OLP protection module, a feedback voltage detection module, a latch signal generation module and a latch signal generation module, wherein the OLP protection module is used for generating a latch signal when detecting that the feedback voltage is smaller than a first voltage; The latch signal detection module is coupled with the feedback voltage detection module and is used for acquiring and processing the latch signal output by the feedback voltage detection module, and the latch signal detection module is also coupled with the OLP protection module and controls the OLP protection module to start the OLP protection according to the latch signal; The power supply control module is coupled with the auxiliary winding and acquires power supply and is used for controlling the rising and falling of the working voltage; the starting module is used for outputting a first input signal for controlling the starting of the circuit system; the shutdown module is used for outputting a second input signal for controlling the shutdown of the circuit system; The starting-up module is coupled with the feedback voltage detection module, and the feedback voltage detection module starts to detect the feedback voltage after receiving the first input signal; the starting-up module is further coupled with the power control module, and the power control module controls the working voltage to rise after receiving the first input signal; the shutdown module is coupled with the OLP protection module, the OLP protection module starts the OLP protection after receiving the second input signal, the shutdown module is further coupled with the power control module, and the power control module controls the working voltage to drop after receiving the second input signal.
7. The circuit protection system of claim 6, wherein the OLP protection module comprises a delay time selection module, a main power switch control module, an OLP control module, and a debounce module; the OLP control module is coupled with the delay time selection module and is used for controlling the delay time selection module to select the delay time of the OLP protection; The OLP control module is also coupled with the main power switch control module and used for controlling the main power switch control module to selectively start or stop a main power switch tube; The de-jittering module is coupled with the OLP control module and is used for controlling the OLP control module to start the OLP protection after waiting for a de-jittering period; The start of the OLP protection includes the delay time selection module starting to select the delay time and includes the main power switch control module selecting to stop the main power switch tube.

Description

Overload protection method, shutdown protection method and circuit protection system Technical Field The present invention relates to the field of electronic information, and in particular, to an overload protection method, a shutdown protection method, and a circuit protection system. Background In the typical SSR secondary feedback field, OLP exists as a core indicator of system performance. The OLP protection is used for monitoring a line in real time, and automatically closing a main power switch tube when an abnormality is monitored, so that a protection effect is achieved. Therefore, protection involving OLP is also a necessary condition for SSR IC circuits. In traditional applications, the OLP protection generally does not cause additional OLP error protection problems in the system, because the protection mode of the OLP protection is directly hooked with the output voltage, regardless of the input energy, when the optocoupler feedback voltage is continuously higher than a certain threshold value when SSR Low Side is connected or is continuously lower than a certain threshold value when SSR HIGH SIDE is connected, and after a debounce period t_debounce is continued, the OLP protection system stops the Switch (i.e. turns off the main power Switch tube), and then enters a restart phase. In a typical VDD RC starting system, as shown in fig. 1, since OLP protection is performed after the Switch is stopped, the system needs to perform UVLO reset (UVLO is abbreviated as "under-voltage lock") and in the process of UVLO reset, the working voltage VDD will be powered down, and the reset starting time is long. Therefore, in the process of resetting the UVLO, the condition of OLP error protection caused by fast startup and shutdown cannot occur, namely the system does not respond to input fast change in the restarting stage. In a typical high voltage self-powered SSR system, as shown in fig. 2. As the SSR IC circuitry is converted from a typical VDD RC start system to a high voltage self-powered system, the OLP protected restart logic cannot use the original ULVO clear restart mode any more. This is because VDD for high voltage self-powered systems is constantly supplied by JEFT-tubing and stabilizes at a constant value. Therefore, the OLP protection logic designed in the existing high-voltage self-powered system is generally expressed in the following sequence (1) entering the output overload state, (2) maintaining more than one debounce period t_debounce, (3) triggering the OLP protection (while VDD is stabilized at a constant value), (4) timing a certain time as the delay time t_delay of the OLP protection, (5) entering the start-up restart of the system, and all protection is cleared (i.e. the OLP protection is stopped). When the OLP protection is triggered due to the overload of the output and VDD is stabilized at a constant value, the OLP protection delay is caused, and after the OLP protection delay is finished, the system enters into normal start-up restart. In a high-voltage self-powered system, FB is kept high to trigger the logic of the OLP protection, but because insufficient input energy can lead to FB to be pulled high in a shutdown mode, the judgment condition that the FB is pulled high to trigger the OLP protection is not the only condition, if the logic of the OLP protection is triggered in the shutdown mode, and the auxiliary winding supply charges are enough to maintain VDD for a long time (> T_debounce) so that the system does not drop to UVLO, the system can enter an OLP protection Delay state (namely an OLP Delay state, the OLP protection time is prolonged) due to the fact that normal shutdown is not carried out along with the input AC OFF and BUS energy drop, and the Delay time of the OLP protection Delay is long. In this state, the fast power on/off will be freed from the response. Because the IC is not turned on in response to the input during the OLP protection delay, the system cannot respond to the output in time, and therefore the advantage of ultra-fast start-up as high-voltage self-power is lost. When the OLP protection is triggered in the shutdown mode and VDD is stabilized at a constant value, the OLP protection delay is also caused, but the delay time of the OLP protection delay is longer, so that the system cannot enter into the fast startup. Therefore, the OLP protection delay in this case is the case of OLP false protection. As set forth above, the prior art has no clear way of determining whether to distinguish between shutdown-triggered OLP protection and overload-triggered OLP protection. In addition, the prior art typically leaks VDD charge more by lengthening the OLP protection Debounce period (OLP Debounce time), so that UVLO reset is performed as soon as possible after AC OFF, which is a serious limitation. Because the difference in configuration capacitance and load of the peripheral auxiliary winding requires that the minimum OLP Debounce time of the system be much