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CN-114513213-B - Error capturing circuit and decoding method based on asymmetric quantum cyclic burst error code

CN114513213BCN 114513213 BCN114513213 BCN 114513213BCN-114513213-B

Abstract

The invention discloses an error capturing circuit and a decoding method based on an asymmetric quantum cyclic burst error code, wherein the error capturing circuit can correct any burst X error and Z error such as a code word design decoding length range by carrying out cyclic shift on an error syndrome so as to quickly position the error position, and the decoding method can respectively correct the Z error and the X error based on the asymmetric quantum cyclic burst error code and the error capturing circuit, so that the decoding performance is optimized, and meanwhile, the degeneracy characteristic is fully considered in decoding to fully exert the decoding limit of a quantum coding theory, so that more quantum burst errors can be corrected under the same code rate.

Inventors

  • FAN JIHAO
  • LI JUN
  • WANG CHENG
  • QIAN YUWEN
  • MEI ZHEN

Assignees

  • 南京理工大学

Dates

Publication Date
20260512
Application Date
20220113

Claims (9)

  1. 1. A rapid decoding method of an asymmetric quantum cyclic burst error code based on an error capturing circuit of the quantum cyclic burst error code is characterized in that, The error capturing circuit comprises a first switch (1), a second switch (2), a third switch (3) and an error accompanying shift register; the first switch (1) is connected with an error concomitant type shift register, the error concomitant type shift register is connected with the second switch (2), and the error concomitant type shift register is also connected with the third switch (3); the method comprises the following steps: step 1, acquiring a required X error syndrome and Z error syndrome by utilizing a quantum measurement circuit, and respectively storing results into an X decoding register and a Z decoding register; Step 2, circularly shifting the X error syndrome in the X decoding register into an error capturing circuit for decoding, and detecting whether the whole error sequence is completely captured or not through continuous cyclic shift of the X error syndrome register, if so, outputting a decoding sequence X, otherwise, failing decoding; Step 3, circularly shifting the Z error in the Z decoding register into an error capturing circuit to decode the Z error, if the Z error sequence is detected to be completely captured, outputting a decoding sequence Z, otherwise, failing to decode; And 4, if the decoders with the X errors and the Z errors return decoding success, the final decoding is successful, otherwise, the decoding fails, and meanwhile, whether degeneracy errors occur or not is judged.
  2. 2. The method for fast decoding an asymmetric quantum cyclic burst error code according to claim 1, wherein the X-error syndrome and the Z-error syndrome required for the acquisition in step1 are specifically: Step 1-1, based on two classical linear cyclic codes satisfying dual inclusion conditions And (3) with Construction of asymmetric quantum cyclic burst error codes Wherein Representing the code length of the code, Representing the code rate of the code, Representing the ability to correct a burst error, Representing the ability to correct X burst errors, Representing the ability to correct Z burst errors, and , And ; Step 1-2, based on cyclic code And (3) with Obtaining the syndrome of X error and Z error required by decoding: ; ; Wherein, the And (3) with Respectively cyclic codes And (3) with Is used for the verification of the check matrix of the (c), For an X-error to occur in the channel, Z error occurred for the channel; step 1-3, will And (3) with Respectively marked as And (3) with The X error and Z error syndromes obtained in the step 1-2 are respectively expressed as the form of polynomials: ; ; Wherein, therein Is that The number of check bits is determined and, Is that Check bit number.
  3. 3. The method for rapidly decoding an asymmetric quantum cyclic burst error code according to claim 1, wherein the decoding of the X error syndrome in step 2 specifically comprises: Step 2-1, circularly shifting an X error syndrome in an X decoding register into an error capturing circuit for decoding, circularly shifting the error syndrome, and judging whether the error is completely captured; And 2-2, outputting a decoding sequence X if the error is completely captured, otherwise judging that the decoding fails.
  4. 4. The method for fast decoding an asymmetric quantum cyclic burst error code according to claim 3, wherein the cyclic shift of the error syndrome in step 2-1 is performed to determine whether the error is completely captured, specifically: Step 2-1-1, pass After the secondary shift, if the X is the last in the syndrome The bit check positions are not all 0 and are the front The bit check positions are all 0's, then the X error is successfully captured before in the X error syndrome Ending decoding, outputting a decoding result, otherwise, entering step 2-1-2; Step 2-1-2, pass After the secondary shift, if the post in the shifted X error syndrome Bit check positions are not all 0 and are the front The bit check positions are all 0's, then the X-error is successfully captured before in the X-error syndrome of the shifted codeword sequence Ending decoding, outputting a decoding result, otherwise, entering the steps 2-1-3; Step 2-1-3, continuing to shift the X error syndrome until the whole cyclic shift process is completed, if the shifted X error syndrome is later Bit check positions are not all 0 and are the front All 0's, then the X error is successfully captured before the shifted codeword sequence X error syndrome Ending decoding, outputting a decoding result, otherwise, entering the steps 2-1-4; step 2-1-4, if the whole cyclic shift process is performed, the X error syndrome after the shift is the front in the syndrome All bit check positions are not all 0, then the X error decoding failure is returned.
  5. 5. The method for rapidly decoding an asymmetric quantum cyclic burst error code according to claim 1, wherein decoding the Z error syndrome in step 3 specifically comprises: Step 3-1, circularly shifting the Z error syndrome in the Z decoding register into an error capturing circuit for decoding, circularly shifting the error syndrome, and judging whether the error is completely captured; and 3-2, outputting a decoding sequence Z if the error is completely captured, otherwise judging that the decoding fails.
  6. 6. The method for fast decoding an asymmetric quantum cyclic burst error code according to claim 5, wherein the cyclic shift of the error syndrome in step 3-1 is performed to determine whether the error is completely captured, specifically: Step 3-1-1, pass After the secondary shift, if the Z error is late in the syndrome The bit check positions are not all 0 and are the front The bit check positions are all 0's, then the Z-error is successfully captured before in the Z-error syndrome Ending decoding, outputting a decoding result, otherwise, entering the step 3-1-2; step 3-1-2, pass After the secondary shift, if the shifted Z is the back in the syndrome Bit check positions are not all 0 and are the front The bit check positions are all 0's, then the Z error is successfully captured before in the Z error syndrome of the shifted codeword sequence Ending decoding, outputting a decoding result, otherwise, entering the step 3-1-3; Step 3-1-3, continuing to shift the Z error syndrome until the whole cyclic shift process is completed, if the shifted Z error syndrome is later Bit check positions are not all 0 and are the front All 0's, then the Z error is successfully captured before the shifted codeword sequence Z error syndrome Ending decoding, outputting a decoding result, otherwise, entering the steps 3-1-4; step 3-1-4, if the shifted Z error accompanies the front in the whole cyclic shift process If all bit check positions are not all 0, a Z error decoding failure is returned.
  7. 7. The method for fast decoding an asymmetric quantum cyclic burst error code according to claim 2, wherein the determining in step 4 is performed as to whether a degenerate error occurs, specifically: If it is And Then the quantum cyclic burst error code is a non-degenerate code, otherwise it is a degenerate code.
  8. 8. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the steps of the method according to any of claims 1-7 when the computer program is executed by the processor.
  9. 9. A computer-readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, carries out the steps of the method according to any one of claims 1-7.

Description

Error capturing circuit and decoding method based on asymmetric quantum cyclic burst error code Technical Field The invention belongs to the field of quantum error correction code decoding, and particularly relates to an error capturing circuit and a decoding method based on quantum cyclic burst error codes. Background In the quantum information processing process, interaction is inevitably generated between the quantum system and an external environment, so that the coherence of the quantum system is seriously attenuated, and finally, the coherence superposition state is degenerated into a mixed state, thereby causing quantum decoherence. The quantum noise interference caused by the quantum decoherence effect is a major obstacle in the quantum information processing process, and on the other hand, the inaccuracy of the quantum logic gate can cause the quantum error to rapidly spread in the quantum computing process, and finally cause the computing failure, which is another major obstacle in the quantum information processing process. The quantum error correction technology is a necessary means for protecting quantum information against quantum incoherent effect and quantum noise influence in the quantum computing and quantum communication process, and the designed quantum error correction code is an important guarantee for realizing future quantum computing and quantum communication. The conventional coding and decoding research of the quantum error correction code all assumes that the error influence of quantum noise interference on a quantum channel is completely independent, namely a discrete independent error model based on a shell. However, the noise interference of the quantum correlation error on the quantum memory channel is more practical. However, neither classical nor quantum memory channels often lack a deterministic probability model to describe them well. In classical communication and digital storage, burst-correcting error codes are often used to correct related types of errors, often with higher code rates than random-correcting error codes. However, most of the current quantum error correction techniques, especially the construction of quantum error correction codes, are for correcting independent and random type errors, and the research on quantum error correction coding and decoding for correcting the related errors under the quantum memory channel is lacking. The quantum burst error correction code obtained at present is only based on direct popularization of a CSS (solid state imaging) structural method and has great limitation. More importantly, besides the study of the coding construction problem of the quantum codes, an effective decoding algorithm is needed to realize low-delay and high-reliability quantum communication and fault-tolerant quantum computation. Disclosure of Invention The invention aims to provide a rapid decoding algorithm of an asymmetric quantum cyclic burst error code, which is used for rapidly positioning an error position by performing cyclic shift on an error syndrome. The technical scheme for realizing the aim of the invention is as follows: An error capturing circuit based on quantum cycle burst error codes comprises a first switch, a second switch, a third switch and an error accompanying shift register; The first switch is connected with the error concomitant shift register, the error concomitant shift register is connected with the second switch, and the error concomitant shift register is also connected with the third switch. The quick decoding method of the asymmetric quantum cyclic burst error code based on the error capturing circuit comprises the following steps: step 1, acquiring a required X error syndrome and Z error syndrome by utilizing a quantum measurement circuit, and respectively storing results into an X decoding register and a Z decoding register; Step 2, circularly shifting the X error syndrome in the X decoding register into an error capturing circuit for decoding, and detecting whether the whole error sequence is completely captured or not through continuous cyclic shift of the X error syndrome register, if so, outputting a decoding sequence X, otherwise, failing decoding; Step 3, circularly shifting the Z error in the Z decoding register into an error capturing circuit to decode the Z error, if the Z error sequence is detected to be completely captured, outputting a decoding sequence Z, otherwise, failing to decode; And 4, if the decoders with the X errors and the Z errors return decoding success, the final decoding is successful, otherwise, the decoding fails, and meanwhile, whether degeneracy errors occur or not is judged. Compared with the prior art, the invention has the beneficial effects that: (1) According to the technical scheme, through an error capturing circuit based on the quantum cyclic burst error code, the error position can be rapidly positioned by carrying out cyclic shift on the error companion code, and any burst X