CN-114530552-B - Protruding memory device with reduced minimum conductance state

Abstract

A memory device may be provided that achieves a reduced minimum conductance state. The device includes a first electrode, a second electrode, and a phase change material between the first electrode and the second electrode, wherein the phase change material achieves a plurality of electrically conductive states depending on a ratio between a crystalline phase and an amorphous phase of the phase change material. The memory device additionally includes a protruding layer portion in a region between the first electrode and the second electrode. Thereby, the area directly covered by the phase change material in the amorphous phase in the reset state of the memory device is larger than the area directed to the protruding layer portion of the phase change material, such that a discontinuity of the conductance state of the memory device is created and a reduced minimum conductance state of the memory device in the reset state is achieved.

Inventors

• KERSTING BARRY
• G. S. sayed
• 5. S.P. jonaragada
• M. Legalo buldo
• A. Sebastian
• T. M. Philip

Assignees

• 国际商业机器公司

Dates

Publication Date

20260512

Application Date

20211115

Priority Date

20201123

Claims (12)

1. 1. A memory device that achieves a reduced minimum conductance state, the device comprising: a first electrode, a second electrode, and a phase change material between the first electrode and the second electrode; A protrusion layer located between the phase change material and the first electrode, wherein in a reset state of the memory device the protrusion layer is positioned adjacent to the phase change material in an amorphous phase, wherein a contact surface of the amorphous phase of the phase change material is in direct contact with a contact surface of the protrusion layer, wherein an area of the contact surface of the protrusion layer is smaller than an area of the contact surface of the amorphous phase of the phase change material; A non-protruding layer positioned adjacent to the protruding layer, wherein a contact surface of the non-protruding layer is in contact with the contact surface of the amorphous phase of the phase change material, and in a reset state of the memory device, the contact surface of the non-protruding layer is in contact with a contact surface of the phase change material in a crystalline phase, wherein the contact surface of the non-protruding layer is flush with the contact surface of the protruding layer; A dielectric layer positioned adjacent to the first electrode, the protruding layer, and the non-protruding layer, wherein a top surface of the dielectric layer is in contact with a bottom surface of the protruding layer and the non-protruding layer, wherein a side surface of the dielectric layer is in contact with a side surface of the first electrode, wherein a top surface of the first electrode is smaller than the bottom surface of the protruding layer.
2. 2. The memory device of claim 1, wherein the protruding layer comprises Ti x N y 、Ta x N y or amorphous carbon.
3. 3. The memory device of claim 1, wherein the non-protruding layer has a lower electrical conductivity than an electrical conductivity of the protruding layer.
4. 4. The memory device of claim 3, wherein: R NON-PROJECTING >> R AMORPHOUS >> R PROJECTION ; Wherein: r NON-PROJECTING = resistance of the non-protruding layer; R AMORPHOUS = resistance of the phase change material, if the region covered by the crystalline phase of the phase change material covers the protruding layer and the non-protruding layer, and R PROJECTION = resistance of the protruding layer.
5. 5. The memory device of claim 3, wherein the protruding layer and the non-protruding layer are doped differently.
6. 6. The memory device of claim 5 wherein the doping of the non-protruding layer and the protruding layer is such that when the phase change material in the amorphous phase completely covers the protruding layer and the non-protruding layer, the device current is at least 2 times lower if compared to the state where the protruding layer is covered by the phase change material in the amorphous phase.
7. 7. The memory device of claim 5, wherein the doping between the protruding layer and the non-protruding layer varies according to a predetermined gradient.
8. 8. The memory device of claim 7, wherein the protruding layer and/or the non-protruding layer is hydrogen or nitrogen doped.
9. 9. The memory device of claim 8, wherein a dopant concentration in the protruding layer that increases the conductivity is higher when compared to the non-protruding layer.
10. 10. The memory device of claim 8, wherein a dopant concentration that reduces the conductivity is higher in the non-protruding layer when compared to the protruding layer.
11. 11. The memory device of claim 1, wherein: During a read operation of the memory device, R CRYST << R PROJECTION , where R CRYST is the resistance of the phase change material in the crystalline phase and R PROJECTION is the resistance of the protruding layer.
12. 12. The memory device of claim 1, wherein R AMORPHOUS >> R PROJECTION .

Description

Protruding memory device with reduced minimum conductance state Technical Field The present invention relates generally to phase change memories and, more particularly, to memory devices that achieve reduced minimum conductance states. Background Universities and industrial research are constantly researching new materials and methods to increase the storage density in semiconductor devices while reducing the power consumption per stored information. In this context, resistive memory devices such as phase change memories and conductive bridge memristors, which can be back-switched between multiple conductance states, are becoming increasingly popular for multi-level data storage and for in-memory and neuromorphic computing hardware. There are several key challenges to achieving multi-level, efficiency, drift and noise. The cell efficiency aspect addresses the ability to program and read devices at various levels with very low current/power consumption. The drift and noise aspects account for drift and noise effects due to inherent material physical properties that have negative effects on resistive sensing. Recently, these challenges have been addressed with a new memory cell concept, denoted protruding phase change memory, in which phase change material is adhered to electrically conductive material called protruding components. In a prominent memory cell, the physical mechanism of resistive storage is substantially decoupled from the information retrieval process. The read current may bypass the amorphous phase change material, whereby it flows through the protruding material without drift, with less noise and with higher conductivity. While reduced drift and read noise are highly beneficial, the device concept also has drawbacks. The minimum conductance of the device can be significantly increased. During read-out, the device dynamic range can be reduced and the idle device (G-0) can pass more current. Thus, array energy efficiency may decrease during readout, and network function may be compromised if the device cannot be programmed to the appropriate OFF state (g=0). Disclosure of Invention Additional aspects and/or advantages will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention. According to one aspect of the present invention, a memory device may be provided that achieves a reduced minimum conductance state. The device may include a first electrode, a second electrode, and a phase change material between the first electrode and the second electrode. Thus, the phase change material may achieve a plurality of electrically conductive states depending on the ratio between the crystalline and amorphous phases of the phase change material. The memory device may further include a protruding layer portion in a region between the first electrode and the second electrode. Thus, the area directly covered by the phase change material in the amorphous phase in the reset state of the memory device may be larger than the area directed to the protruding layer portion of the phase change material. In this way, discontinuities in the conductance state of the memory device may be created, and a reduced minimum conductance state of the memory device in the reset state may be achieved. Drawings The foregoing and other aspects, features, and advantages of certain exemplary embodiments of the invention will become more apparent from the following description, taken in conjunction with the accompanying drawings, in which: FIG. 1 illustrates a block diagram of an embodiment of a memory device implementing a reduced minimum conductance state of the present invention. Fig. 2 shows a conductivity diagram for a conventional protruding liner as proposed herein, compared to patterned protrusions. Fig. 3A shows a design of a protruding memory device. FIG. 3B is a table showing current I depending on the voltage provided to the phase change memory cell. Fig. 4 shows a crossbar of neural network elements, which can be used as a basis for programming weighting values. Fig. 5 shows a lateral cell design on a dielectric layer. FIG. 6 illustrates a limited design of a phase change memory cell as another embodiment. Fig. 7A and 7B show a side-by-side comparison of a locally delimited protruding layer portion and a protruding layer with a dopant gradient. Fig. 7C and 7D illustrate the resistance of the liner associated with fig. 7A and 7B. Fig. 7E and 7F show different characteristics of the read current related to fig. 7A and 7B. Detailed Description The following description with reference to the accompanying drawings is provided to assist in a comprehensive understanding of exemplary embodiments of the invention as defined by the claims and their equivalents. It includes various specific details to aid in understanding, but these are to be considered merely exemplary. Accordingly, one of ordinary skill in the art will recognize that