CN-114582387-B - Conditional row activation and access during refresh of a memory device and associated methods and systems

Abstract

The present invention relates to conditional row activation and access during refresh of a memory device and associated methods and systems. The memory device may perform an operation for the activated row at the same time as performing the refresh operation. In some embodiments, the memory device receives an active ACT command for a section of a memory bank while performing a refresh operation on the memory bank. The ACT command may be performed by the memory device if certain conditions are met without damaging the data being refreshed. Subsequently, the memory device generates a signal indicating that the ACT command has been accepted to activate the row identified by the ACT command. Further, the memory device may execute a subsequent access command for the row in parallel with the refresh operation.

Inventors

• M. S. Wisconsin
• D. M. BAER
• B. T. peha
• 5. N. Johnson
• K. Alexander

Assignees

• 美光科技公司

Dates

Publication Date

20260505

Application Date

20211126

Priority Date

20201130

Claims (20)

1. 1. An apparatus for memory operation, comprising: at least one bank of memory cells, wherein each bank includes a plurality of sections each having a set of word lines, and Circuitry configured to: Receiving an active ACT command for a first section of the plurality of sections while performing a refresh operation on a same bank of the at least one bank of memory cells; In response to receiving the ACT command, determining whether to activate a first word line of the set of word lines of the first section based on whether the refresh operation is for the first section, and A signal is generated indicating whether the first word line has been activated.
2. 2. The apparatus of claim 1, wherein the refresh operation being performed is based on a refresh command received prior to receiving the ACT command.
3. 3. The apparatus of claim 1, wherein the circuitry is further configured to: the refresh operation is determined to be performed on a second section of the plurality of sections, the second section being different from the first section.
4. 4. The apparatus of claim 3, wherein the circuitry is further configured to: Activating the first word line of the first segment in response to determining to perform the refresh operation on the second segment, and A signal is generated indicating that the first word line of the first section has been activated.
5. 5. The apparatus of claim 3, wherein the first section is not coupled to a bit line associated with the second section during the refresh operation.
6. 6. The apparatus of claim 3, wherein each bank comprises a third section of the plurality of sections, the third section being different from the first section and the second section, and coupled to a bit line associated with the second section during the refresh operation.
7. 7. The apparatus of claim 1, wherein the circuitry is further configured to: If the circuitry determines to activate the first word line of the first section, an operation is performed in response to an access command for the first word line.
8. 8. The apparatus of claim 1, wherein the apparatus comprises at least one of a warning pin, a data pin, or a pin, and the circuitry is further configured to: at least one of the alert pin, the data pin, or the pin is configured to transmit the signal to a host device coupled with the apparatus.
9. 9. The apparatus of claim 1, wherein the circuitry is further configured to: in response to receiving the ACT command, the signal is transmitted to a host device coupled to the apparatus for a predetermined period of time.
10. 10. The apparatus of claim 1, wherein the memory cells of each bank comprise dynamic random access memory DRAM cells.
11. 11. A method for memory operation, comprising: Receiving an active ACT command for a first section of a plurality of sections at a memory device having at least one bank of memory cells while performing a refresh operation on the same bank of the at least one bank of memory cells, each bank of the at least one bank including the plurality of sections each having a set of word lines; In response to receiving the ACT command, determining whether to activate a first word line of the set of word lines of the first section based on whether the refresh operation is for the first section, and A signal is generated indicating whether the first word line has been activated.
12. 12. The method of claim 11, wherein the memory device performs the refresh operation in response to a refresh command received prior to receiving the ACT command.
13. 13. The method as in claim 11, further comprising: the refresh operation is determined to be for a second section of the plurality of sections, the second section being different from the first section.
14. 14. The method as in claim 13, further comprising: activating the first word line of the first section in response to determining that the refresh operation is for the second section, and The signal is generated indicating that the first word line of the first section has been activated.
15. 15. The method as in claim 11, further comprising: If the memory device determines to activate the first word line of the first section, an operation is performed in response to an access command for the first word line.
16. 16. The method as in claim 11, further comprising: at least one of a warning pin, a data pin, or a pin of the memory device is configured for transmitting the signal to a host device coupled with the memory device.
17. 17. The method as in claim 11, further comprising: after receiving the ACT command, the signal is transmitted to a host device coupled to the memory device for a predetermined period of time.
18. 18. A system for memory operation, comprising: Host device, and A memory device coupled with the host device, the memory device comprising: At least one bank of memory cells, each bank having a plurality of sections each having a set of word lines, and Circuitry configured to: Receiving an ACT command for a first section of the plurality of sections while performing a refresh operation on the same bank of the at least one bank of memory cells; In response to receiving the ACT command, determining whether to activate a first word line of the set of word lines of the first section based on whether the refresh operation is for the first section, and A signal is generated indicating whether the first word line has been activated.
19. 19. The system of claim 18, wherein the host device is configured to: The signal is monitored for a predetermined period of time after the ACT command is transmitted to the memory device.
20. 20. The system of claim 18, wherein the host device is configured to: An access command for the first word line is transmitted if the signal indicates that the first word line has been activated.

Description

Conditional row activation and access during refresh of a memory device and associated methods and systems Technical Field The present disclosure relates generally to memory devices, and more particularly to conditional row activation and access during refresh of memory devices and associated methods and systems. Background Memory devices are widely used for information to be associated with various electronic devices, such as computers, wireless communication devices, cameras, digital displays, and the like. Memory devices are frequently provided as internal, semiconductor integrated circuits, and/or external removable devices in computers or other electronic devices. There are many different types of memory, including volatile and non-volatile memory. Volatile memory, including Random Access Memory (RAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), synchronous Dynamic Random Access Memory (SDRAM), and the like, requires a source of applied power to maintain its data. In contrast, nonvolatile memory can retain its stored data even when no external power is supplied. Nonvolatile memory may be used in a variety of technologies, including flash memory (e.g., NAND and NOR), phase Change Memory (PCM), ferroelectric random access memory (FeRAM), resistive Random Access Memory (RRAM), magnetic Random Access Memory (MRAM), and the like. Improving a memory device may generally include increasing memory cell density, increasing read/write speed or otherwise decreasing operating latency, increasing reliability, increasing data retention, reducing power consumption or reducing manufacturing costs, and other metrics. Disclosure of Invention In one aspect, the present disclosure is directed to an apparatus comprising a bank of memory cells, wherein the bank includes a plurality of sections each having a set of word lines, and circuitry configured to receive an Activate (ACT) command for a first section of the plurality of sections while a refresh operation is performed on the bank, determine whether to activate a first word line of the set of word lines of the first section in response to receiving the ACT command, and generate a signal indicating whether the first word line has been activated. In another aspect, the present disclosure is directed to a method including receiving an Activate (ACT) command for a first sector of a plurality of sectors at a memory device of a bank of memory cells while performing a refresh operation on the bank, the bank including a plurality of sectors each having a set of word lines, determining whether to activate a first word line of the set of word lines of the first sector in response to receiving the ACT command, and generating a signal indicating whether the first word line has been activated. In other aspects, the disclosure relates to a system including a host device, and a memory device coupled with the host device, the memory device including a bank of memory cells, the bank having a plurality of sections each having a set of word lines, and circuitry configured to receive an Activate (ACT) command for a first section of the plurality of sections while a refresh operation is performed on the bank, determine whether to activate a first word line of the set of word lines of the first section in response to receiving the ACT command, and generate a signal indicating whether the first word line has been activated. Drawings The present disclosure will be understood more fully from the detailed description given below and from the accompanying drawings of various embodiments of the disclosure. The components in the drawings are not necessarily to scale. In fact, emphasis instead being placed upon clearly illustrating the principles of the present technology. FIG. 1 is a block diagram schematically illustrating a memory device according to an embodiment of the present technology. Fig. 2A is a block diagram schematically illustrating a bank of memory cells of a memory device in accordance with an embodiment of the present technology, and fig. 2B is a block diagram schematically illustrating a segment of a bank of memory cells in accordance with an embodiment of the present technology. FIG. 3 is a block diagram of a system with a memory device configured in accordance with an embodiment of the present technology. FIG. 4 is a flow chart illustrating a method of operating a memory device in accordance with an embodiment of the present technique. Detailed Description Methods, systems, and apparatus are disclosed for a memory device (e.g., DRAM) that provides conditional row activation and access during refresh operations. Some semiconductor memory devices, such as DRAMs, store data as charge accumulated in a cell capacitor ("cell"). Due to the voltage difference between the capacitor and surrounding components, charge accumulated in the cell capacitor may escape (which may be referred to as "leakage") to surrounding components (e.g., metal lines, semiconductor j