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CN-114814731-B - Data interface device, and applicable data acquisition equipment and sensor system

CN114814731BCN 114814731 BCN114814731 BCN 114814731BCN-114814731-B

Abstract

The application discloses a data interface device, and applicable data acquisition equipment and a sensor system. The data interface device comprises an input unit, a sampling unit, a clock recovery control unit, a clock generation unit and an output unit, wherein the input unit, the sampling unit, the clock recovery control unit, the clock generation unit and the output unit are coupled, the clock recovery control unit outputs a clock recovery control signal reflecting phase deviation between a second analog signal and a clock signal by detecting the received first digital signal in a preset number of clock half periods, and the clock recovery control signal uses a field to represent the phase value of the adjusted clock signal. The clock generating unit adjusts the clock signal by using the clock recovery control signal so that the sampling unit can accurately sample the received analog signal to obtain various data provided by the sensor. According to the application, the clock signal is quickly recovered by adjusting the phase interval and the phase value in the phase interval, so that the clock recovery efficiency of the sensor in the process of transmitting data in real time is improved.

Inventors

  • ZHANG YOUHUA
  • ZHOU WENTING

Assignees

  • 加特兰微电子科技(上海)有限公司

Dates

Publication Date
20260512
Application Date
20220130
Priority Date
20220128

Claims (15)

  1. 1. A data interface device, comprising: an input unit, for coupling with a channel to receive a first analog signal from the channel and output a corresponding second analog signal to be converted; The sampling unit is coupled to the input unit and is used for sampling the received second analog signal according to the received clock signal so as to output a first digital signal and the clock signal; The clock recovery control unit is coupled with the sampling unit, and outputs a clock recovery control signal reflecting the phase deviation between the second analog signal and the clock signal by detecting the received first digital signal in a preset number of clock half periods, wherein the clock recovery control signal indicates the phase value of the clock signal to be adjusted by using a field; The clock generation unit is coupled with the clock recovery control unit and the sampling unit, and is used for adjusting the generated clock signal according to the received clock recovery control signal and outputting the adjusted clock signal to the sampling unit; and the output unit is coupled with the sampling unit and used for converting the corresponding acquired first digital signal into a second digital signal under the control of the received clock signal and outputting the second digital signal.
  2. 2. The data interface device of claim 1, wherein the input unit comprises: two signal leads for coupling with the channel to receive a first analog signal from the channel represented by a differential signal; And the equalization circuit is connected with the two signal leads and is used for performing equalization processing on the received first analog signal so as to output the second analog signal.
  3. 3. The data interface device of claim 1, wherein the clock recovery control unit comprises: The N-bit first register is used for adjusting the temporarily stored binary phase value in a shifting interpolation mode, wherein N is an integer larger than 1; and the output circuit is connected with the N-bit first register and the clock generation unit, and is used for generating the clock recovery control signal according to the binary phase value stored in the N-bit first register and outputting the clock recovery control signal to the clock generation unit.
  4. 4. A data interface device according to claim 3, wherein the clock recovery control unit further comprises: The first shift decision circuit is coupled with the sampling unit, detects the phase of the first digital signal in each clock half period of a preset number, and outputs a control signal determined according to the phase discrimination result of the number; The first phase adjustment circuit is coupled to the N-bit first register and the first shift decision circuit, and is used for adjusting the stored binary phase value from the high-order side or the low-order side in the N-bit first register according to the control signal.
  5. 5. The data interface apparatus of claim 4, wherein the first shift decision circuit comprises: The phase shift detection circuit structure is coupled with the sampling unit and detects the first digital signal in a preset number of clock half cycles to obtain phase discrimination detection data; And the phase shift control circuit structure is coupled with the phase shift detection circuit structure and the first phase adjustment circuit, counts bit values in the phase discrimination detection data, and outputs a control signal reflecting the counting result so that the first phase adjustment circuit can select to adjust the stored binary phase value from the high-order side or the low-order side in the N-bit first register.
  6. 6. The data interface device of claim 5, wherein the first phase adjustment circuit comprises: And the selection circuit structure is connected with the first shift decision circuit and is used for selecting to coarsely adjust the numerical value of the high side or the low side in the first register or fine adjust the numerical value of the high side or the low side in the first register according to the control signal.
  7. 7. The data interface device of claim 6, wherein the selection circuit structure comprises an encoder or a decoder coupled to the phase shift detection circuit structure for outputting the information for the coarse or fine bits according to the received external command.
  8. 8. The data interface device of claim 6, wherein the clock recovery control unit further comprises: The second shift decision circuit is coupled to the phase shift detection circuit structure and the selection circuit structure, and is used for counting data lead and data lag of at least one group of received phase discrimination detection data respectively, and outputting a control signal for selecting coarse adjustment or fine adjustment according to the count, so that the selection circuit structure can execute selection operation according to the count.
  9. 9. The data interface apparatus of claim 8, wherein the second shift decision circuit comprises: The judgment logic circuit structure is coupled with the phase shift detection circuit structure, and is used for respectively carrying out pulse count statistics of data advance and data retard on at least one group of received phase discrimination detection data and outputting a level signal reflecting the phase deviation amplitude obtained by multiple phase discrimination; and the comparator is coupled with the judging logic circuit structure and the phase shifting control circuit structure and is used for comparing the level signal with a preset reference level so as to output a control signal containing selection of coarse adjustment or fine adjustment.
  10. 10. The data interface device of claim 4, wherein the clock recovery control unit further comprises: The M-bit second register is coupled to the output circuit and is used for storing a binary phase interval value of a clock signal so that the clock recovery control signal output by the output circuit comprises the binary phase interval value and the binary phase value; The second phase adjustment circuit is coupled to the N-bit first register, the M-bit second register and the first shift decision circuit, and is used for selectively adjusting the binary phase interval value in the M-bit second register according to control logic formed by the binary phase value in the N-bit first register and the control signal.
  11. 11. The data interface device of claim 1, wherein the output unit comprises a serial-to-parallel circuit coupled to the sampling unit for converting the received first digital signal represented by the differential signal into a second digital signal represented by the multiplexed parallel signal and outputting the second digital signal.
  12. 12. A system of sensors, which are arranged in a sensor array, characterized by comprising the following steps: The system comprises a first radar sensor, a first data interface device, a second radar sensor, a first data interface device and a second data interface device, wherein the first data interface device is used for transmitting a measurement signal detected by the first radar sensor, and the measurement signal is used for reflecting at least one of a baseband digital signal detected by the first radar sensor, at least one of a distance, a speed and an azimuth angle between the first radar sensor and a target, and target detection data of the target; The second radar sensor comprises a second data interface device and a third data interface device, wherein the second data interface device is connected with the first data interface device through a channel, the second data interface device is a data interface device according to any one of claims 1-11 and is used for receiving the measurement signals, and the third data interface device is used for forwarding the measurement signals.
  13. 13. The sensor system of claim 12, further comprising a data processing device coupled to the third data interface device for at least one of processing the measurement signal and outputting a corresponding object detection result, interaction data, or control command.
  14. 14. The sensor system of claim 12, wherein the channel comprises any one of a microstrip line, a coaxial cable, or an optical fiber.
  15. 15. A data acquisition device comprising a sensor system according to any one of claims 12-14 and data transmission interface means for emitting a detected measurement signal.

Description

Data interface device, and applicable data acquisition equipment and sensor system Technical Field The embodiment of the application relates to a data transmission technology, in particular to a data interface device, and data acquisition equipment and a sensor system which are applicable to the data interface device. Background The data interface means comprises data interface means for transmitting analog signals for converting received digital signals into analog signals for transmission in the transmission medium, depending on the transmission medium, the transmission path length etc. The data interface device further comprises a data interface device for receiving the analog signal for recovering the analog signal from the transmission medium as a digital signal. In some data transmission technologies, in order to recover a digital signal from an analog signal, each data interface device needs to select a transmitting and receiving circuit system according to a transmission mode of the analog signal, so as to ensure that the analog signal has identifiable signal variation of a circuit resolution level after passing through a transmission medium, thus ensuring that a data interface device on a receiving side can extract the digital signal from the analog signal. Disclosure of Invention The application provides a data interface device, and a data acquisition device and a sensor system which are applicable to the data interface device, so as to solve the technical problems that the data interface device consumes longer time and causes a plurality of technical problems when recovering a clock signal for sampling a digital signal from an analog signal. In a first aspect, the application provides a data interface device comprising an input unit coupled to a channel for receiving a first analog signal from the channel and outputting a corresponding second analog signal to be converted, a sampling unit coupled to the input unit for sampling the received second analog signal according to the received clock signal to output a first digital signal and the clock signal, a clock recovery control unit coupled to the sampling unit for outputting a clock recovery control signal reflecting a phase deviation between the second analog signal and the clock signal by detecting the received first digital signal during a preset number of clock half-cycles, wherein the clock recovery control signal represents a phase value of the adjusted clock signal by a field, a clock generation unit coupled to the clock recovery control unit and the sampling unit for adjusting the generated clock signal according to the received clock recovery control signal and outputting the adjusted clock signal to the sampling unit, and an output unit coupled to the sampling unit for converting the corresponding first digital signal into a second digital signal under the control of the received clock signal and outputting the second digital signal. In a second aspect, an embodiment of the application provides a sensor system, which comprises a first radar sensor, a second radar sensor and a third data interface device, wherein the first radar sensor comprises a first data interface device, the first data interface device is used for transmitting a measurement signal detected by the first radar sensor, the measurement signal is used for reflecting at least one of a baseband digital signal detected by the first radar sensor, at least one of a distance, a speed and an azimuth angle between the first radar sensor and a target, and target detection data of the target, the second radar sensor comprises a second data interface device and a third data interface device, the second data interface device is connected with the first data interface device through a channel, the second data interface device is used for receiving the measurement signal and is used for forwarding the measurement signal. In a third aspect, the application also provides a sensor system, which comprises a first radar sensor, a second radar sensor and a third radar interface device, wherein the first radar sensor comprises a first data interface device, the first data interface device is used for transmitting a measurement signal detected by the first radar sensor, the measurement signal is used for reflecting at least one of a baseband digital signal detected by the first radar sensor, at least one of a distance, a speed and an azimuth angle between the first radar sensor and a target, and target detection data of the target, the second radar sensor comprises a second data interface device and a third data interface device, the second data interface device is connected with the first data interface device through a channel, the second data interface device is used for receiving the measurement signal and is used for forwarding the measurement signal. The data interface device, the data acquisition equipment and the sensor system provided by the application can be used for adjusting the