CN-114883387-B - SM-JTE terminal structure of novel floating junction silicon carbide power device and preparation method thereof
Abstract
The invention discloses an SM-JTE terminal structure of a novel floating junction silicon carbide power device and a preparation method thereof, wherein the method comprises the steps of providing an N+ substrate; the method comprises the steps of manufacturing at least one layer of epitaxial structure on one side surface of an N+ substrate, manufacturing a first N-epitaxial layer, a floating junction p region and a JTE region, wherein the floating junction p region and the JTE region are formed after ion implantation are carried out on one side surface of the first N-epitaxial layer, which is far away from the N+ substrate, of the first N-epitaxial layer, growing a second N-epitaxial layer on one side surface of the at least one layer of epitaxial structure, which is far away from the N+ substrate, of the first N-epitaxial layer, manufacturing a surface terminal, growing an oxide layer on one side surface of the second N-epitaxial layer, which is far away from the substrate, manufacturing a first electrode on one side surface of the second N-epitaxial layer, which is far away from the substrate, of the second N+ substrate, manufacturing a second electrode on one side surface of the N+ substrate, which is far away from the epitaxial structure, and the first electrode is contacted with the oxide layer. According to the invention, the JTE region is divided into a plurality of SMJTE structures, and the electric field peak value of a single point of the JTE region can be dispersed to the SMJTE structures, so that the power device has stronger dose shift resistance while the electric field peak value is reduced.
Inventors
- TANG XIAOYAN
- LIU YANCONG
- ZHANG YUMING
- CHEN LILI
- YUAN HAO
- SONG QINGWEN
- CHEN ZEYU
- WANG RONG
Assignees
- 西安电子科技大学
Dates
- Publication Date
- 20260505
- Application Date
- 20220330
Claims (9)
- 1. The preparation method of the SM-JTE terminal structure of the novel floating junction silicon carbide power device is characterized by comprising the following steps: providing an N+ substrate; The epitaxial structure comprises a first N-epitaxial layer, a floating junction p region and a JTE region, wherein the floating junction p region and the JTE region are formed after ion implantation are carried out on the surface of one side of the first N-epitaxial layer, which is far away from the N+ substrate, wherein the floating junction p region is positioned in an active region, the JTE region is positioned in a terminal region, and the JTE region comprises a plurality of SMJTE structures arranged along a first direction; growing a second N-epitaxial layer on the surface of one side of the at least one layer of epitaxial structure away from the N+ substrate, and manufacturing a surface terminal in the second N-epitaxial layer; Growing an oxide layer on the surface of one side of the second N-epitaxial layer away from the substrate; manufacturing a first electrode on the surface of one side of the second N-epitaxial layer far away from the substrate, and manufacturing a second electrode on the surface of one side of the N+ substrate far away from the epitaxial structure, wherein the first electrode is contacted with the oxide layer; In the first direction, the width of the plurality SMJTE of structures in the first direction gradually decreases, the spacing between two adjacent SMJTE structures gradually increases, and the width of each SMJTE structure itself and the sum of the widths of the adjacent SMJTE structures need to be kept consistent.
- 2. The method for preparing the SM-JTE termination structure of the novel floating junction silicon carbide power device of claim 1, wherein the epitaxial structure is prepared by the steps of: Growing a first N-epitaxial layer on one side surface of the N+ substrate by using a Chemical Vapor Deposition (CVD) process; carrying out active region Al ion implantation on the surface of one side of the first N-epitaxial layer far away from the N+ substrate to form a floating junction p region; And carrying out terminal area Al ion implantation on the surface of one side of the first N-epitaxial layer far away from the N+ substrate to form a JTE region.
- 3. The method for manufacturing the SM-JTE termination structure of the novel floating junction silicon carbide power device according to claim 1, wherein in the first direction, the width of the SMJTE structures is 1-100 μm, and the distance between two adjacent SMJTE structures is 1-10 μm.
- 4. The method for fabricating a novel floating junction silicon carbide power device of claim 3 wherein said JTE region has a doping concentration of 1 x 10 16 ~1×10 18 cm -3 .
- 5. The method for manufacturing the SM-JTE termination structure of the novel floating junction silicon carbide power device according to claim 4, wherein the SMJTE structure has a thickness of 0.5-2 μm along a direction perpendicular to a plane where the N+ substrate is located.
- 6. The method for fabricating a novel floating junction silicon carbide power device of claim 1 wherein the floating junction p-region has a doping concentration of 1 x 10 16 ~1×10 20 cm -3 .
- 7. The method for fabricating a SM-JTE termination structure of a novel floating junction silicon carbide power device of claim 6, wherein the floating junction p-region comprises a plurality of floating junctions aligned along a first direction; In the first direction, the width of the floating knot is 1-5 μm, and the distance between two adjacent floating knots is 1-5 μm.
- 8. The method for manufacturing the SM-JTE termination structure of the novel floating junction silicon carbide power device according to claim 1, wherein the doping concentration of the N+ substrate is 1×10 18 ~1×10 20 cm -3 , and the thickness of the N+ substrate is 50-400 μm along the direction perpendicular to the plane of the N+ substrate.
- 9. The SM-JTE terminal structure of the novel floating junction silicon carbide power device is characterized in that the novel SM-JTE terminal structure of the novel floating junction silicon carbide power device is prepared by the preparation method of the SM-JTE terminal structure of the novel floating junction silicon carbide power device as claimed in any one of claims 1 to 8.
Description
SM-JTE terminal structure of novel floating junction silicon carbide power device and preparation method thereof Technical Field The invention belongs to the technical field of semiconductors, and particularly relates to an SM-JTE (Space Modulated Junction Termination Extension, space modulation junction terminal extension) terminal structure of a novel floating junction silicon carbide power device and a preparation method thereof. Background In order to improve the performance of 4H-SiC power devices, a super junction structure represented by a floating junction is applied to related power devices. The floating junction structure is that one or more layers of discontinuous P+ structures are added into an epitaxial layer of a traditional 4H-SiC power device, and the floating junction structure is similar to a PN junction structure formed inside the epitaxial layer. When the device works in a reverse state, the addition of the floating junction structure can change the electric field distribution which is originally triangular or trapezoidal in the epitaxial layer into upper and lower double-triangular distribution with the floating junction as a dividing line, so that the reverse breakdown voltage of the device is improved under the condition that the thickness and the concentration of the epitaxial layer are unchanged. However, because the floating structure is added in the traditional device, the influence of the epitaxial layer structure, the source region floating structure, the terminal structure and other factors on the performance of the device is comprehensively considered when the device structure is designed, and the design is complex. Therefore, design optimization research on the terminal structure of the floating junction device in the related art is needed to ensure the performance of the floating junction structure. Disclosure of Invention In order to solve the problems in the prior art, the invention provides an SM-JTE terminal structure of a novel floating junction silicon carbide power device and a preparation method thereof. The technical problems to be solved by the invention are realized by the following technical scheme: in a first aspect, the present invention provides a method for preparing an SM-JTE terminal structure of a novel floating junction silicon carbide power device, including: providing an N+ substrate; The epitaxial structure comprises a first N-epitaxial layer, a floating junction p region and a JTE region, wherein the floating junction p region and the JTE region are formed after ion implantation are carried out on the surface of one side of the first N-epitaxial layer, which is far away from the N+ substrate, wherein the floating junction p region is positioned in an active region, the JTE region is positioned in a terminal region, and the JTE region comprises a plurality of SMJTE structures arranged along a first direction; growing a second N-epitaxial layer on the surface of one side of the at least one layer of epitaxial structure away from the N+ substrate, and manufacturing a surface terminal in the second N-epitaxial layer; Growing an oxide layer on the surface of one side of the second N-epitaxial layer away from the substrate; And manufacturing a first electrode on the surface of one side of the second N-epitaxial layer far away from the substrate, and manufacturing a second electrode on the surface of one side of the N+ substrate far away from the epitaxial structure, wherein the first electrode is contacted with the oxide layer. In one embodiment of the invention, the epitaxial structure is prepared by the steps of: Growing a first N-epitaxial layer on one side surface of the N+ substrate by using a Chemical Vapor Deposition (CVD) process; carrying out active region Al ion implantation on the surface of one side of the first N-epitaxial layer far away from the N+ substrate to form a floating junction p region; And carrying out terminal area Al ion implantation on the surface of one side of the first N-epitaxial layer far away from the N+ substrate to form a JTE region. In one embodiment of the present invention, the width of the plurality SMJTE of structures in the first direction is gradually reduced and the spacing between two adjacent SMJTE structures is gradually increased in the first direction. In one embodiment of the present invention, in the first direction, the width of the SMJTE structures is 1 to 100 μm, and the pitch between two adjacent SMJTE structures is 1 to 10 μm. In one embodiment of the present invention, the JTE region has a doping concentration of 1X 10 16~1×1018cm-3. In one embodiment of the present invention, the SMJTE structures have a thickness of 0.5-2 μm along a direction perpendicular to the plane of the n+ substrate. In one embodiment of the present invention, the floating junction p-region has a doping concentration of 1×10 16~1×1020cm-3. In one embodiment of the present invention, the floating junction p-region includes a plur