CN-115050717-B - Semiconductor package substrate, method of manufacturing the same, semiconductor package, and method of manufacturing the same

CN115050717BCN 115050717 BCN115050717 BCN 115050717BCN-115050717-B

Abstract

A semiconductor package substrate includes a base layer including a conductive substance and having a first surface and a second surface opposite to the first surface, and having a first groove or first trench located on the first surface and a second groove or second trench located on the second surface, a first resin buried in the first groove or first trench located on the first surface of the base layer, and a groove portion located at least one inflection point of the first surface of the base layer and having a depth of 1/2 or more of the thickness of the base layer based on the first surface.

Inventors

JIN YUANBIN
Jiang Shengri
Pei Renxie
YIN DONGCHEN

Assignees

海成帝爱斯株式会社

Dates

Publication Date: 20260508
Application Date: 20220308
Priority Date: 20210308

Claims (13)

1. A semiconductor package substrate is provided with a base layer comprising a conductive substance and having a first surface and a second surface opposite to the first surface, and having a first groove or first trench located on the first surface and a second groove or second trench located on the second surface; A first resin buried in the first groove or the first trench on the first surface of the base layer, and A groove portion located at least one inflection point of the first surface of the base layer and having a depth of 1/2 or more of the thickness of the base layer based on the first surface, wherein, At least a part of the first resin is exposed to the outside through the groove portion, and The width of the base layer based on the first surface corresponding to the groove portion is greater than the width of the groove portion based on the second surface by 30 Or larger.
2. The semiconductor package substrate of claim 1, wherein, The depth of the groove part is 100 Or larger.
3. The semiconductor package substrate of claim 1, wherein, The thickness of the basal layer corresponding to the groove part is 35 Or larger.
4. The semiconductor package substrate of claim 1, further comprising: a coating layer provided on a surface of the base layer other than the first resin.
5. The semiconductor package substrate of claim 1, further comprising: a second resin buried in the second groove or the second trench located at the second surface of the base layer.
6. A semiconductor package provided with the semiconductor package substrate according to any one of claims 1 to 5, and A semiconductor chip mounted on the semiconductor package substrate.
7. A semiconductor package substrate manufacturing method includes preparing a base layer made of a conductive material having a first surface and a second surface; Forming a first groove or first trench on the first surface of the base layer; filling the first groove or the first trench with a first resin; curing the first resin; Removing the exposed portion of the first resin overfilled in the first recess or the first trench; Forming a second groove or a second trench on the second surface of the base layer to expose at least a portion of the first resin filled in the first groove or the first trench, and Forming a third groove on the first surface of the base layer, wherein, The depth of the third groove is 1/2 or more of the thickness of the base layer, At least a part of the first resin is exposed to the outside through the third groove, and The width of the base layer observed based on the second surface side corresponding to the third groove is formed to be greater than the width of the third groove observed based on one side by 30 Or larger.
8. The method for manufacturing a semiconductor package substrate according to claim 7, wherein, The forming of the second groove or the second trench of the base layer is performed simultaneously with the forming of the third groove.
9. The method for manufacturing a semiconductor package substrate according to claim 7, wherein, The third groove has a width in a first direction and a length in a second direction intersecting the first direction, and The width of the cutting area is smaller than the length of the third groove.
10. The method for manufacturing a semiconductor package substrate according to claim 7, wherein, The depth of the third groove is 100 Or larger.
11. The method for manufacturing a semiconductor package substrate according to claim 7, wherein, Forming the second groove or the second trench on the second surface of the base layer to expose at least a portion of the resin filled in the first groove or the first trench, and forming the third groove between the first surface of the base layer, Further comprising filling the second groove or the second trench with a second resin.
12. The method for manufacturing a semiconductor package substrate according to claim 7, wherein, Between forming the third groove on the first surface of the base layer and cutting the base layer along a cutting region passing through a center portion of the third groove, Further comprising plating a surface of the base layer exposed through the first and second surfaces to form a coating.
13. A semiconductor package manufacturing method includes preparing a base layer made of a conductive material having a first surface and a second surface; Forming a first groove or first trench on the first surface of the base layer; filling the first groove or the first trench with a first resin; curing the first resin; Removing the exposed portion of the first resin overfilled in the first recess or the first trench; Forming a second groove or a second trench on the second surface of the base layer to expose at least a portion of the first resin filled in the first groove or the first trench; forming a third groove on the first surface of the base layer; mounting a semiconductor chip on a semiconductor package substrate, and Dicing the semiconductor package substrate along the third groove, wherein, The depth of the third groove is 1/2 or more of the thickness of the base layer, At least a part of the first resin is exposed to the outside through the third groove, and The width of the base layer observed based on the second surface side corresponding to the third groove is formed to be greater than the width of the third groove observed based on one side by 30 Or larger.

Description

Semiconductor package substrate, method of manufacturing the same, semiconductor package, and method of manufacturing the same Technical Field The present invention relates to a semiconductor package substrate, a method of manufacturing the same, a semiconductor package, and a method of manufacturing the same, and more particularly, to a method of manufacturing a semiconductor package substrate that is easily soldered, a semiconductor package substrate manufactured using the method, and a method of manufacturing the same. Background Semiconductor devices are packaged for use in semiconductor package substrates having fine circuit patterns and/or input/output (I/O) terminals for such packages. With the higher performance and/or higher integration of semiconductor devices, miniaturization and/or higher performance of electronic devices using the same, and the like, the line width of fine circuit patterns and the like of semiconductor package substrates has become narrower and the complexity thereof has become higher. Existing semiconductor package substrates are manufactured by forming through holes by using Copper clad laminates (coppers CLAD LAMINATE (CCL)) stacked together with Copper foils (coppers Foil), and the inner surfaces of the through holes are plated to electrically connect the top Copper Foil to the bottom Copper Foil, and then patterning the top and bottom Copper foils using photoresist. However, such a conventional semiconductor package substrate manufacturing method has problems of complicated manufacturing process and low accuracy. Recently, therefore, in order to simplify the manufacturing process, a method of manufacturing a semiconductor package substrate by filling a conductive base layer with an insulating substance has been introduced. Disclosure of Invention An object of an embodiment of the present invention is to provide a semiconductor package substrate that is easy to solder and a method of manufacturing the same. However, these problems are exemplary, and the scope of the present invention is not limited thereto. According to an aspect of the present invention, there is provided a semiconductor package substrate including a base layer including a conductive substance and having a first surface and a second surface opposite to the first surface and having a first groove or a first trench located on the first surface and a second groove or a second trench located on the second surface, a first resin buried in the first groove or the first trench located on the first surface of the base layer, and a groove portion located at least one inflection point of the first surface of the base layer and having a depth of 1/2 or more of a thickness of the base layer based on the first surface In the present embodiment, the depth of the groove portion may be 100 μm or more. In the present embodiment, the thickness of the base layer corresponding to the groove portion may be 35 μm or more. In the present embodiment, the width of the base layer based on the first surface corresponding to the groove portion may be 30 μm or more larger than the width of the groove portion based on the second surface. In this embodiment, it may further include a coating layer provided on a surface of the base layer other than the first resin. In this embodiment, at least a part of the first resin may be exposed to the outside through the groove portion. In this embodiment, the second resin may be buried in the second groove or the second trench located at the second surface of the base layer. In the present embodiment, the width of the base layer based on the first surface corresponding to the groove portion may be the same as the width of the groove portion based on the second surface. According to another aspect of the present invention, there is provided a semiconductor package provided with a semiconductor package substrate, and a semiconductor chip mounted on the semiconductor package substrate. According to still another aspect of the present invention, there is provided a semiconductor package substrate manufacturing method including preparing a base layer made of a conductive material having a first surface and a second surface, forming a first groove or a first trench on the first surface of the base layer, filling the first groove or the first trench with a first resin, curing the first resin, removing an exposed portion of the first resin overfilled in the first groove or the first trench, forming a second groove or a second trench on the second surface of the base layer to expose at least a portion of the first resin filled in the first groove or the first trench, and forming a third groove on the first surface of the base layer, wherein a depth of the third groove is 1/2 or more of a thickness of the base layer. In this embodiment, the forming of the second groove or the second groove of the base layer may be performed simultaneously with the forming of the third groove. In this embodiment, the third gr