CN-115202566-B - Memory system and method of operating the same

Abstract

The present disclosure relates to a memory system and a method of operating the same. A memory controller that controls a memory device may include a model manager configured to obtain log information regarding usage of the memory device over a predetermined period of time and generate a regression model that predicts a lifetime of the memory device based on the log information, and a performance manager configured to determine a degradation interval of performance degradation of the memory device based on the regression model and adjust parameter values related to operation of the memory device in the degradation interval.

Inventors

• HUANG ZHIXUN

Assignees

• 爱思开海力士有限公司

Dates

Publication Date

20260505

Application Date

20211216

Priority Date

20210406

Claims (17)

1. 1. A memory controller that controls a memory device, the memory controller comprising: a model manager that obtains log information regarding usage of the memory device over a predetermined period of time and generates a regression model that predicts a lifetime of the memory device based on the log information, and A performance manager that determines a degradation interval of performance degradation of the memory device based on the regression model, and adjusts a parameter value related to operation of the memory device in the degradation interval, Wherein the log information includes an amount of time of use, which indicates an accumulated amount of time to apply power to the memory device, Wherein the model manager: Obtaining said log information for said predetermined period of time until said amount of time of use reaches a predetermined reference amount, Calculating an increment of the average erasure number for the amount of time of use of each of the acquired pieces of log information, and The regression model is generated based on an average of the deltas.
2. 2. The memory controller of claim 1, wherein the performance manager comprises an interval manager, the interval manager to: Calculating a degradation start point, which is the amount of use time corresponding to a predetermined threshold value of the average erase count, and an end-of-life, which is the amount of use time corresponding to a predetermined limit value of the average erase count, by using the regression model, and A section from the degradation start point to the lifetime end point is determined as the degradation section.
3. 3. The memory controller of claim 2, Wherein the performance manager further comprises a parameter manager that adjusts a parameter value related to operation of the memory device in response to the average number of erasures, and Wherein the parameter value related to the operation of the memory device is at least one of a parameter value for determining an internal supply voltage of the memory device, a parameter value for determining a commanded processing speed of the memory device, and a parameter value for determining a number of read operation retries of the memory device.
4. 4. The memory controller of claim 3, wherein the degradation interval varies according to a parameter value related to operation of the memory device.
5. 5. The memory controller of claim 3, wherein the parameter manager adjusts parameter values related to operation of the memory device differently according to parameters of the parameter values.
6. 6. The memory controller of claim 3, wherein the interval manager further divides the degradation interval into a plurality of subintervals according to at least a preset ratio of the limit value.
7. 7. The memory controller of claim 6, wherein the parameter manager adjusts parameter values related to operation of the memory device differently for each of the plurality of subintervals.
8. 8. The memory controller of claim 1, wherein the model manager further updates the regression model based on log information obtained after generating the regression model.
9. 9. The memory controller of claim 1, wherein the model manager obtains the log information by using self-monitoring, analysis, and reporting techniques for the memory device.
10. 10. A memory system, comprising: Memory device, and A memory controller for controlling the memory device, Wherein the memory controller comprises: A model manager that generates a regression model that predicts performance of the memory device based on log information regarding usage of the memory device, and A performance manager that determines a degradation interval of performance degradation of the memory device based on the regression model, and adjusts a parameter value related to operation of the memory device in the degradation interval, Wherein the log information includes information regarding an amount of use time that indicates an accumulated amount of time to apply power to the memory device and a write amount that indicates an amount of data in which a write operation is performed in the memory device during the amount of use time, Wherein the model manager further: Acquiring the log information for a predetermined period of time until the amount of time of use reaches a predetermined reference amount, and Calculating an increment of the writing amount for the usage time amount of each of the acquired pieces of log information, and The regression model is generated based on an average of the deltas.
11. 11. The memory system of claim 10, wherein the performance manager comprises an interval manager, the interval manager to: Calculating a degradation start point, which is the amount of use time corresponding to a predetermined threshold value of the writing amount, and an end-of-life, which is the amount of use time corresponding to a predetermined limit value of the writing amount, by using the regression model, and A section from the degradation start point to the lifetime end point is determined as the degradation section.
12. 12. The memory system according to claim 11, Wherein the performance manager further comprises a parameter manager that adjusts a parameter value related to operation of the memory device in response to the write quantity, and Wherein the parameter value related to the operation of the memory device is at least one of a parameter value for determining an internal supply voltage of the memory device, a parameter value for determining a commanded processing speed of the memory device, and a parameter value for determining a number of read operation retries of the memory device.
13. 13. A method of operating a memory controller that controls a memory device, the method comprising: acquiring log information on use of the memory device for a predetermined period of time; calculating an increment of an average erasure number for an amount of use time of each of the acquired pieces of log information; generating a regression model that predicts a lifetime of the memory device based on the log information; determining a degradation interval of performance degradation of the memory device based on the regression model, and Adjusting a parameter value related to operation of the memory device in the degradation interval, Wherein the log information includes an amount of time of use, which indicates an accumulated amount of time to apply power to the memory device, Wherein the log information for the predetermined period of time is acquired until the amount of time of use reaches a predetermined reference amount, Wherein the regression model is generated based on an average of the increments.
14. 14. The method of claim 13, wherein the determining the degradation interval comprises: calculating a degradation start point, which is the amount of use time corresponding to a predetermined threshold value of the average erase count, and an end-of-life, which is the amount of use time corresponding to a predetermined limit value of the average erase count, by using the regression model, and A section from the degradation start point to the lifetime end point is determined as the degradation section.
15. 15. The method of claim 14 wherein the adjusting the parameter values comprises adjusting at least one of a parameter value for determining an internal supply voltage of the memory device, a parameter value for determining a commanded processing speed of the memory device, and a parameter value for determining a number of read operation retries of the memory device in response to the average erase count.
16. 16. The method of claim 13, further comprising updating the regression model based on log information obtained after generating the regression model.
17. 17. The method of claim 13, wherein the obtaining the log information comprises obtaining information about the amount of time used and the average number of erasures by using self-monitoring, analysis, and reporting techniques for the memory device.

Description

Memory system and method of operating the same Related cross-reference The present application claims priority from korean patent application No. 10-2021-0044875, filed on 6/4/2021, the entire disclosure of which is incorporated herein by reference. Technical Field The present disclosure relates to an electronic device, and more particularly, to a memory system and a method of operating the same. Background A memory system is a device that stores data under the control of a host device such as a computer or a smart phone. The memory device may include a memory device storing data and a memory controller controlling the memory device. Memory devices are classified into volatile memory devices and nonvolatile memory devices. Volatile memory devices are devices that store data only when power is supplied and lose stored data when power is lost. Volatile memory devices include, for example, static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), and the like. A nonvolatile memory device is a device that does not lose data even if power is turned off. Nonvolatile memory devices include, for example, read Only Memory (ROM), programmable memory (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), flash memory, and the like. Disclosure of Invention One embodiment of the present disclosure provides a memory system that compensates for performance degradation of a memory device and a method of operating the same. According to one embodiment of the disclosure, a memory controller controlling a memory device may include a model manager configured to obtain log information regarding usage of the memory device over a predetermined period of time and generate a regression model that predicts a lifetime of the memory device based on the log information, and a performance manager configured to determine a degradation interval of performance degradation of the memory device based on the regression model and adjust parameter values related to operation of the memory device in the degradation interval. According to another embodiment of the present disclosure, a memory system may include a memory device and a memory controller controlling the memory device. The memory controller may include a model manager configured to generate a regression model that predicts performance of the memory device based on log information regarding usage of the memory device, and a performance manager configured to determine a degradation interval of performance degradation of the memory device based on the regression model and adjust parameter values related to operation of the memory device in the degradation interval. According to another embodiment of the present disclosure, a method of operating a memory controller controlling a memory device may include obtaining log information regarding usage of the memory device over a predetermined period of time, generating a regression model predicting a lifetime of the memory device based on the log information, determining a degradation interval of performance degradation of the memory device based on the regression model, and adjusting a parameter value related to operation of the memory device in the degradation interval. According to another embodiment of the present disclosure, an operating method of a management device includes obtaining a linear regression relationship between an average erase count of a memory block included in a target device and an accumulated power-up time amount of the target device, determining a section regarding the power-up time amount in which performance of the target device in terms of an average erase count is predicted to be deteriorated based on the linear regression relationship and a first threshold and a second threshold of a predetermined average erase count, and adjusting an operating parameter of the target device to compensate for the performance predicted to be deteriorated when the power-up time amount falls within the section. According to the present technology, a memory system and an operating method thereof that compensate for performance degradation of a memory device can be provided. Drawings Fig. 1 is a diagram illustrating a memory system including a memory device according to one embodiment of the present disclosure. Fig. 2 is a diagram illustrating the memory device of fig. 1. Fig. 3 is a diagram showing a configuration of any one of the memory blocks of fig. 2. Fig. 4 is a table showing log information regarding the use of a memory device according to another embodiment of the present disclosure. Fig. 5 is a diagram illustrating generation of a regression model according to one embodiment of the present disclosure. Fig. 6 is a block diagram illustrating a method of compensating for performance degradation of a memory device according to another embodiment of the present disclosure. Fig. 7 is a diagram illustrating a method of determining a degradation interval and adjusting a paramete