CN-115248614-B - Dual-oscillator local networking controller area network clock generator using precision resistor references

Abstract

The present disclosure relates to a dual oscillator local networking controller area network clock generator using precision resistor references. An electronic circuit includes a first pin corresponding to a reference signal and a second pin corresponding to an external resistor connected to the second pin on a first side and to ground on a second side. The apparatus also includes a first oscillator having a first frequency loop configured to receive the reference signal via a first pin, receive a current associated with a voltage applied to the external resistor via a second pin, and lock the first frequency output at a frequency associated with the reference signal. The apparatus also includes a second oscillator having a second frequency loop configured to receive the first frequency output, scale the frequency of the first frequency output, and lock the second frequency output at the scaled frequency of the first frequency output.

Inventors

• ROGERS SUSAN HENNING
• J.L. Glenn

Assignees

• 德尔福知识产权有限公司

Dates

Publication Date

20260505

Application Date

20220420

Priority Date

20210428

Claims (20)

1. 1. An apparatus for a local networking controller area network, the apparatus comprising: An electronic circuit, the electronic circuit comprising: a first pin corresponding to a reference signal; A second pin corresponding to an external resistor connected to the second pin on a first side and to ground on a second side; A first oscillator having a first frequency loop, the first frequency loop configured to: Receiving the reference signal via the first pin; receiving a current associated with a voltage applied to the external resistor via the second pin, and Locking the first frequency output at a frequency associated with the reference signal, and A second oscillator having a second frequency loop, the second frequency loop configured to: Receiving the first frequency output; scaling the frequency of the first frequency output, and The second frequency output is locked at the scaled frequency of the first frequency output.
2. 2. The apparatus of claim 1, wherein the first frequency loop comprises at least a time-shared switched-mirror frequency divider.
3. 3. The apparatus of claim 2, wherein the time-shared switch-mirror divider comprises an input mirror reference connected to a plurality of field effect transistor drains.
4. 4. The apparatus of claim 1, wherein the second frequency output has a frequency that is greater than a frequency of the first frequency output.
5. 5. The apparatus of claim 1, wherein the electronic circuit is associated with the local networking controller area network.
6. 6. The apparatus of claim 1, wherein the reference signal corresponds to a remotely located microcontroller.
7. 7. The apparatus of claim 6, wherein the electronic circuit and the remotely located microcontroller are disposed in a vehicle.
8. 8. The apparatus of claim 1, wherein the electronic circuit is configured to reject reference signals having frequencies outside a frequency range.
9. 9. The apparatus of claim 1, wherein the electronic circuit receives the reference signal in response to an ignition switch being in an on position.
10. 10. The apparatus of claim 1, wherein the electronic circuit is configured to maintain a frequency of the second frequency output in response to the absence of the reference signal.
11. 11. The apparatus of claim 1, wherein the electronic circuit comprises an application specific integrated circuit.
12. 12. The apparatus of claim 1, wherein the external resistor comprises a precision resistor.
13. 13. The apparatus of claim 1, wherein the first oscillator comprises a low frequency oscillator.
14. 14. The apparatus of claim 1, wherein the second oscillator comprises a high frequency oscillator.
15. 15. An electronic circuit for generating a local networking controller area network clock, the electronic circuit comprising: A first pin configured to receive a reference signal from a remote microcontroller; A second pin corresponding to an external precision resistor connected to the second pin on a first side and to ground on a second side; a low frequency oscillator having a first frequency loop configured to: Receiving the reference signal via the first pin; Receiving a current associated with a voltage applied to the external precision resistor via the second pin, and Locking the first frequency output at a frequency associated with the reference signal, and A high frequency oscillator having a second frequency loop configured to: Receiving the first frequency output; scaling the frequency of the first frequency output, and The second frequency output is locked at the scaled frequency of the first frequency output.
16. 16. The electronic circuit of claim 15, wherein the frequency of the second frequency output is greater than the frequency of the first frequency output.
17. 17. The electronic circuit of claim 15, wherein the low frequency oscillator is configured to reject reference signals having frequencies outside of a frequency range.
18. 18. The electronic circuit of claim 15, wherein the low frequency oscillator receives the reference signal in response to an ignition switch being in an on position.
19. 19. The electronic circuit of claim 15, wherein the high frequency oscillator is configured to maintain a frequency of the second frequency output in response to the absence of the reference signal.
20. 20. The electronic circuit of claim 15, wherein the low frequency oscillator comprises at least a first power time-sharing switch-mirror divider.

Description

Dual-oscillator local networking controller area network clock generator using precision resistor references Technical Field The present disclosure relates to vehicle circuits, and more particularly to systems and apparatus for local networking controller area network clock generation. Background Vehicles (e.g., cars, trucks, sport utility vehicles, cross-country vehicles, minivans, or other suitable vehicles) typically include a computing environment that includes various computing devices, such as microcontrollers and/or other computing devices, for controlling and/or monitoring various aspects of such vehicles. Electronic communications between computing devices in a computing environment may be implemented using high-speed controller area network communication links, such as a local networking controller area network (PN-CAN). Typically, to operate within specifications, the timing requirements of such communication links may include high accuracy requirements (e.g., -0.5%) and/or fast clock requirements (e.g., greater than 6 megahertz). Such accuracy requirements may depend on the performance capabilities of the various transceiver blocks within the corresponding vehicle. Furthermore, the PN-CAN may use a message decoding feature, which may require a clock generator that is capable of operating during vehicle standby operation while using minimal current. Disclosure of Invention The present disclosure relates generally to vehicle computing environments. An aspect of the disclosed embodiments includes an apparatus. The apparatus includes an electronic circuit including a first pin corresponding to a reference signal and a second pin corresponding to an external resistor connected to the second pin on a first side and to ground on a second side. The apparatus also includes a first oscillator having a first frequency loop configured to receive a reference signal via a first pin, receive a current associated with a voltage applied to the external resistor via a second pin, and lock a first frequency output at a frequency associated with the reference signal. The apparatus also includes a second oscillator having a second frequency loop configured to receive the first frequency output, scale the frequency of the first frequency output, and lock the second frequency output at the scaled frequency of the first frequency output. Another aspect of the disclosed embodiments includes an electronic circuit for generating a local networking controller area network clock. The electronic circuit includes a first pin configured to receive a reference signal from a remote microcontroller and a second pin corresponding to an external precision resistor connected to the second pin on a first side and to ground on a second side. The electronic circuit also includes a low frequency oscillator having a first frequency loop configured to receive a reference signal via a first pin, to receive a current associated with a voltage applied to the external precision resistor via a second pin, and to lock the first frequency output at a frequency associated with the reference signal. The electronic circuit also includes a high frequency oscillator having a second frequency loop configured to receive the first frequency output, scale the frequency of the first frequency output, and lock the second frequency output at the scaled frequency of the first frequency output. These and other aspects of the disclosure are provided in the following detailed description of the embodiments, in the appended claims and in the drawings. Drawings The disclosure is best understood from the following detailed description when read in connection with the accompanying drawing figures. It is emphasized that, according to common practice, the various features of the drawing are not to scale. On the contrary, the dimensions of the various features are arbitrarily expanded or reduced for clarity. Fig. 1 generally illustrates a vehicle in accordance with the principles of the present disclosure. Fig. 2 generally illustrates a controller area network electronic circuit (CAN oscillator top level block diagram) in accordance with the principles of the present disclosure. Fig. 3 generally illustrates a low frequency oscillator digital control loop (CAN low frequency oscillator digital control loop block diagram) in accordance with the principles of the present disclosure. Fig. 4 generally illustrates a high frequency oscillator digital control loop (CAN high frequency oscillator digital control loop block diagram) in accordance with the principles of the present disclosure. Fig. 5 generally illustrates a time-shared switched-mirror frequency divider (chopper) in accordance with the principles of the present disclosure. Detailed Description The following discussion is directed to various embodiments of the invention. While one or more of these embodiments may be preferred, the disclosed embodiments should not be interpreted, or otherwise used, as limiting the sc