CN-115273933-B - Unique chip identifier utilizing unclonable characteristics of an on-chip resistive memory array

CN115273933BCN 115273933 BCN115273933 BCN 115273933BCN-115273933-B

Abstract

A semiconductor device is disclosed that includes a plurality of two-terminal resistive switching devices (420), wherein an electrode (322) in contact with a resistive switching layer (324) has a root mean square surface roughness (425, 427) greater than 2nm, and a correlation coefficient of intrinsic characteristics of the two resistive switching devices is in a range of-0.1 to 0.1. The random physical characteristics of the resistive switching device on the semiconductor chip may be used to generate unique data for electronic identification of the semiconductor chip to verify communication with the semiconductor chip or to generate encryption keys.

Inventors

ZHAO XINGXIAN
H. Nazarian
Sang .ruan
J. GUY
Z.LI

Assignees

昕原半导体(上海)有限公司

Dates

Publication Date: 20260505
Application Date: 20210406
Priority Date: 20200406

Claims (20)

1. An electronic device, comprising: A plurality of resistive switching devices disposed on a substrate of a semiconductor die, wherein each of the plurality of resistive switching devices comprises a layer of resistive switching material disposed between a first electrode and a second electrode, wherein one of the first electrode or the second electrode comprises metal particles that diffuse in a material of the layer of resistive switching material in response to an external stimulus applied between the first electrode and the second electrode, and wherein the plurality of resistive switching devices are associated with an operating characteristic having a correlation coefficient in a range of-0.1 to 0.1 between resistive switching devices of the plurality of resistive switching devices; a first plurality of wires providing electrical connection to top electrodes of the plurality of resistive switching devices; A second plurality of wires providing electrical connection to bottom electrodes of the plurality of resistive switching devices; a control circuit for partitioning a subset of the plurality of resistive switching devices to define a first subset of the resistive switching devices for generating a data sequence based on the operating characteristics having the correlation coefficient, and A sensing circuit disposed at least partially on the semiconductor substrate and electrically connected to the plurality of resistive switching devices through the first and second pluralities of wires, wherein the sensing circuit is configured to selectively apply a sensing signal to a first wire of the first plurality of wires and a second wire of the second plurality of wires to apply the sensing signal to a first resistive switching device of the first subset of the resistive switching devices, wherein the sensing circuit is configured to determine a first response signal from the first resistive switching device in response to the sensing signal, and wherein the sensing circuit is configured to selectively apply the sensing signal to a third wire of the first and second pluralities of wires to apply the sensing signal to a second resistive switching device of the first subset of the resistive switching devices, wherein the sensing circuit is configured to determine the second response signal from the resistive switching device in response to the sensing signal.
2. The electronic device of claim 1, wherein the control circuit is configured to receive an input command that determines the subset of the resistive switching devices, wherein the subset of the plurality of resistive switching devices is partitioned and the first subset of the resistive switching devices is defined in response to receiving the input command.
3. The electronic device of claim 1, wherein the control circuit is further configured to divide an additional subset of the plurality of resistive switching devices, thereby defining a second subset of one-time programmable resistive switching devices, wherein the additional subset is different from the subset of the plurality of resistive switching devices and is used for one-time programmable operations.
4. The electronic device of claim 3, wherein the control circuit is further configured to define resistive switching devices of the plurality of resistive switching devices that are not included in the first subset of resistive switching devices and that are not included in the second subset of one-time programmable resistive switching devices as rewritable non-volatile resistive storage devices, thereby defining a third subset of rewritable non-volatile resistive storage devices.
5. The electronic device of claim 1, wherein a correlation coefficient between the first response signal and the second response signal is in a range of-0.1 to 0.1.
6. The electronic device of claim 5, wherein a correlation coefficient between the first response signal and the second response signal is in a second range of-0.01 to 0.01.
7. The electronic device of claim 6, wherein a correlation coefficient between the first response signal and the second response signal is in a third range of-0.003 to 0.003.
8. The electronic device of claim 1, wherein a first characteristic associated with the first resistive switching device is determined in response to the first response signal and the sense signal, and A second characteristic associated with the second resistive switching device is determined in response to the second response signal and the sense signal.
9. The electronic device of claim 8, wherein the first and second features are selected from the group consisting of intrinsic unprogrammed current, intrinsic programming voltage, intrinsic programming speed, maximum programming current, programming resistance, erase voltage, minimum erase current, and at least one after-program and erase state current.
10. The electronic device of claim 1, wherein the control circuit further comprises a processing circuit communicatively connected to the sensing circuit and configured to compare the first and second response signals to one or more qualitative or quantitative references.
11. The electronic device of claim 10, wherein the processing circuit is configured to assign a binary value to the first response signal based on a comparison of the first response signal to a reference of the one or more qualitative or quantitative references.
12. The electronic device of claim 10, wherein the processing circuit is further configured to assign a second binary value to the second response signal based on a comparison of the second response signal to the reference, wherein the processing circuit is configured to generate the data sequence at least in part by the binary value and the second binary value.
13. The electronic device of claim 10, wherein the processing circuit is configured to assign a first logic value to the first response signal or the second response signal if the value of the first response signal or the second response signal, respectively, is below a lower reference of the one or more qualitative or quantitative references, and The processing circuit is configured to assign a second logical value to the first response signal or the second response signal if the value of the first response signal or the second response signal, respectively, is higher than the higher of the one or more qualitative or quantitative references.
14. The electronic device of claim 13, wherein the processing circuit is configured to discard the first response signal or the second response signal if the value of the first response signal or the second response signal is above the lower reference and below the higher reference.
15. The electronic device of claim 14, wherein the processing circuit is configured to generate the data sequence at least in part from a first digital value or a second digital value.
16. The electronic device of claim 13, wherein the processing circuit is configured to receive an input value and to determine an output value in response to the input value, the first logic value, and the second logic value.
17. The electronic device of claim 13, wherein the processing circuit is configured to: Receiving a first input value and a second input value; Determining a first output value in response to the first input value and the first logic value, and A second output value is determined in response to the second input value and the second logic value.
18. The electronic device of claim 1, wherein the control circuit is configured to store an order of the first subset of the resistive switching devices and to generate the data sequence by bit values derived from operational characteristics of the first subset of the resistive switching devices, wherein the bit values are ordered according to the first subset of the resistive switching devices to generate the data sequence.
19. The electronic device of claim 1, wherein the control circuit is configured to define sets of two or more resistive switching devices from the first subset of resistive switching devices and to assign each set of two or more resistive switching devices to a respective bit of the data sequence.
20. The electronic device of claim 19, wherein the control circuit assigns a first logic value to a bit of the data sequence in response to a first resistive switching device of the two or more resistive switching devices in the group of bits assigned to meeting a criterion, wherein the criterion is selected from the group consisting of a first performance programming event, a first performance erase event, a lowest intrinsic current magnitude, a lowest intrinsic programming voltage, and a lowest erase voltage, and The control circuit assigns a second logic value to the bit of the data sequence in response to a second one of the two or more resistive switching devices in the group of bits being assigned to meet the criteria.

Description

Unique chip identifier utilizing unclonable characteristics of an on-chip resistive memory array The scheme is a divisional application, the application date of the main application is 2021, 4 and 6, and the invention is named as a unique chip identifier utilizing the unclonable characteristic of an on-chip resistance memory array, and the application number is 2021800066064. Cross Reference to Related Applications This patent application claims the benefit of priority from U.S. provisional application No. 63/005879 entitled "resistive random access device, system, and manufacturing technology," filed on 6/4/2020, the entire contents of which are incorporated herein by reference for all purposes. Technical Field The present disclosure relates generally to two-terminal resistive switching memories and, as one illustrative example, uses the random nature of resistive switching devices to uniquely identify a chip. Background Resistive switching memory represents a recent innovation in the field of integrated circuit technology. While a variety of resistive switching memory technologies are in the development stage, various technical concepts of resistive switching memory have been demonstrated and in one or more verification stages to demonstrate or refute the associated theory or technology. In the near future, resistive switching memory technology is expected to exhibit strong evidence of great advantages over competing technologies in the semiconductor electronics industry. Proposals have been made to actually apply resistive switching techniques to memory applications of electronic devices. For example, resistive switching elements are often theoretically possible alternatives to Metal Oxide Semiconductor (MOS) memory transistors for electronic storage of digital information at least in part. For example, the model of a resistive switching memory device provides some potential technical advantages over a non-volatile flash MOS-type transistor. In view of the above, the assignee of the present disclosure continues to develop and address the practical application of resistive switching technology. Disclosure of Invention The following presents a simplified summary of the specification in order to provide a basic understanding of some aspects of the specification. This summary is not an extensive overview of the specification. It is intended to neither identify key or critical elements of the specification nor delineate the scope of any particular embodiment of the specification or any scope of the claims. Its purpose is to present some concepts of the description in a simplified form as a prelude to the more detailed description that is presented in the present disclosure. Embodiments of the present disclosure provide for utilizing the physical characteristics of resistive switching devices to generate unique data for such resistive switching devices. This unique data may be used for various purposes related to electronic identification. As one example, data generated by physical characteristics of a resistive switching device on a semiconductor chip may be used to form a unique identifier sequence for the semiconductor chip. In further embodiments, the present disclosure provides physical characteristics of resistive switching devices that may have or may be manufactured to have random or substantially random characteristics. Further, these physical characteristics may create different measurable unique characteristics between adjacent resistive switching devices (or other suitable groupings) on the array, between different resistive switching devices on the semiconductor die, between different resistive switching devices on a wafer or wafers, or the like, or combinations of the foregoing. In addition, physical characteristics are provided that produce consistent measurements of a given resistive switching device or set of devices through multiple measurements at different temperatures or different operating conditions, etc. Thus, the unique data generated by these measurements can be reliably reproduced over multiple measurement cycles under various operating conditions. This in turn achieves a very low error rate when reproducing the unique identifier sequence derived from the resistive switching device, as disclosed herein. Yet another embodiment discloses various measurable unique characteristics of a resistive switching device that can be used to generate unique identifier data. Examples include the raw leakage current of a device or group of devices, the raw resistance of a device, the raw switching speed of a device, the raw programming voltage of a device, the differential programming speeds of multiple groups of devices, the differential programming voltages of multiple groups of devices, and other examples disclosed herein, or which may be known in the art, or which are reasonably communicated to one of skill in the art by the context provided herein. In a further embodiment, the measurement proce