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CN-115374029-B - Information transmission method and device, storage medium and electronic equipment

CN115374029BCN 115374029 BCN115374029 BCN 115374029BCN-115374029-B

Abstract

The application discloses an information transmission method which is applied to an information transmission system, wherein the information transmission system comprises a first control chip, a second control chip and a storage chip, the first control chip is connected with the storage chip through a first communication interface, the second control chip is connected with the storage chip through a second communication interface, the method comprises the steps that when the first control chip monitors that a target pin corresponding to the first communication interface is in a non-occupied state, the first control chip performs information transmission with the storage chip, and when the second control chip monitors that the target pin corresponding to the second communication interface is in the non-occupied state, the second control chip performs information transmission with the storage chip. By adopting the application, the influence of the communication effect between the first control chip and the second control chip is avoided.

Inventors

  • CHEN DILIANG

Assignees

  • 深圳海翼智新科技有限公司

Dates

Publication Date
20260512
Application Date
20220809

Claims (10)

  1. 1. An information transmission method is characterized by being applied to an information transmission system, wherein the information transmission system comprises a first control chip, a second control chip and a storage chip, the first control chip is connected with the storage chip through a first communication interface, the second control chip is connected with the storage chip through a second communication interface, and the first control chip and the second control chip use file systems with the same format, and the method comprises the following steps: when the first control chip monitors that a target pin corresponding to the first communication interface is in a non-occupied state, the first control chip and the storage chip carry out information transmission; when the second control chip monitors that the target pin corresponding to the second communication interface is in a non-occupied state, the second control chip and the storage chip carry out information transmission; when the first control chip monitors that the target pin corresponding to the first communication interface is in a non-occupied state, the first control chip and the storage chip perform information transmission, including: When the first control chip monitors that a target pin corresponding to the first communication interface is in a non-occupied state, the first control chip writes first information into the storage chip, and simultaneously sets the target pin corresponding to the first communication interface to be in an occupied state through the first control chip; after the information transmission between the first control chip and the storage chip is finished, setting a target pin corresponding to the first communication interface to be in a non-occupied state through the first control chip; When the second control chip monitors that the target pin corresponding to the second communication interface is in a non-occupied state, the second control chip and the storage chip perform information transmission, including: When the second control chip monitors that the target pin is in a non-occupied state, the second control chip reads first information from the storage chip.
  2. 2. The method of claim 1, wherein the unoccupied state comprises a target pin corresponding to the first communication interface being in a high state.
  3. 3. The method of claim 2, wherein when the first control chip monitors that the target pin corresponding to the first communication interface is in a non-occupied state, the first control chip performs information transmission with the storage chip, including: When the first control chip monitors that a target pin corresponding to the first communication interface is in a high-level state, the first control chip writes first information into the storage chip; Or; When the first control chip monitors that the target pin corresponding to the first communication interface is in a high-level state, the first control chip reads the first information and/or the second information from the storage chip, wherein the second information is written in by the second control chip to the storage chip.
  4. 4. The method of claim 2, wherein when the second control chip monitors that the target pin corresponding to the second communication interface is in a non-occupied state, the second control chip performs information transmission with the storage chip, including: When the second control chip monitors that the target pin corresponding to the second communication interface is in a high-level state, the second control chip writes second information into the storage chip; Or; When the second control chip monitors that the target pin corresponding to the second communication interface is in a high-level state, the second control chip reads first information or the second information from the storage chip, wherein the first information is written in by the first control chip to the storage chip.
  5. 5. The method of claim 2, wherein the first control chip performs information transfer with the memory chip, comprising: the first control chip performs information transmission with the storage chip, and simultaneously sets a target pin corresponding to the first communication interface to be in a low level state; The second control chip performs information transmission with the storage chip, and includes: And the second control chip performs information transmission with the storage chip, and simultaneously sets a target pin corresponding to the second communication interface to be in a low level state.
  6. 6. The method according to claim 2 or 5, wherein after the first control chip performs information transmission with the memory chip, further comprising: the first control chip sets a target pin corresponding to the first communication interface to be in a high-level state; after the second control chip and the storage chip perform information transmission, the method further comprises: And the second control chip sets a target pin corresponding to the second communication interface to be in a high-level state.
  7. 7. The method according to claim 2, wherein the method further comprises: When the first control chip monitors that a target pin corresponding to the first communication interface is in a low-level state and the second control chip and the storage chip carry out information transmission, the first control chip stores corresponding information into a fixed memory and continuously monitors the level state of the target pin; when the first control chip monitors that the target pin corresponding to the first communication interface is in a non-occupied state, the first control chip and the storage chip perform information transmission, including: When the first control chip monitors that the level state of the target pin is switched from the low level state to the high level state, the first control chip reads corresponding information from the fixed memory and writes the information into the memory chip; Or; when the second control chip monitors that a target pin corresponding to the second communication interface is in a low-level state and the first control chip and the storage chip carry out information transmission, the second control chip stores corresponding information into a fixed memory and continuously monitors the level state of the target pin; When the second control chip monitors that the target pin corresponding to the second communication interface is in a non-occupied state, the second control chip and the storage chip perform information transmission, including: When the second control chip monitors that the level state of the target pin is switched from the low level state to the high level state, the second control chip reads corresponding information from the fixed memory and writes the information into the memory chip.
  8. 8. The method of claim 1, wherein the first control chip is connected to the memory chip through a first communication interface and the second control chip is connected to the memory chip through a second communication interface, comprising: The first control chip is connected with the storage chip through a first communication interface, and the second control chip is connected with the storage chip through a second communication interface.
  9. 9. An information transmission device, characterized in that is applied to information transmission system, information transmission system includes first control chip, second control chip and memory chip, first control chip with memory chip passes through first communication interface connection, second control chip with memory chip passes through second communication interface connection, first control chip with the file system of second control chip use the same format, the device includes: The first information transmission module is used for transmitting information between the first control chip and the storage chip when the first control chip monitors that the target pin corresponding to the first communication interface is in a non-occupied state; when the first control chip monitors that the target pin corresponding to the first communication interface is in a non-occupied state, the first control chip writes first information into the memory chip, and simultaneously sets the target pin corresponding to the first communication interface to be in an occupied state through the first control chip, wherein the first information is information which the first control chip needs to store into the memory chip, and after the first control chip and the memory chip are in the non-occupied state, the first control chip sets the target pin corresponding to the first communication interface to be in the non-occupied state through the first control chip; the second information transmission module is used for transmitting information between the second control chip and the storage chip when the second control chip monitors that the target pin corresponding to the second communication interface is in a non-occupied state, and transmitting information between the second control chip and the storage chip when the second control chip monitors that the target pin corresponding to the second communication interface is in a non-occupied state, wherein the second control chip reads first information from the storage chip when the second control chip monitors that the target pin is in a non-occupied state.
  10. 10. An electronic device comprising a processor and a memory, wherein the memory stores a computer program adapted to be loaded by the processor and to perform the method steps of any of claims 1-8.

Description

Information transmission method and device, storage medium and electronic equipment Technical Field The present application relates to the field of computer technologies, and in particular, to an information transmission method, an information transmission device, a storage medium, and an electronic device. Background The main control chip and the micro-processing unit can communicate through an I2C serial bus (Inter-INTEGRATED CIRCUIT) or a universal serial data bus (Universal Asynchronous Receiver/Transmitter, UART). Disclosure of Invention The embodiment of the application provides an information transmission method, an information transmission device, a storage medium and electronic equipment, which can ensure that information to be transmitted between a first control chip and a second control chip is not required to be transmitted through an I2C serial bus or a UART, and the information is stored by taking the storage chip as a bridge of the first control chip and the second control chip, so that even if the transmitted information is large, the transmission of instructions is not influenced, the congestion of a communication channel between the first control chip and the second control chip is not caused, and further, the influence of the communication effect between the first control chip and the second control chip can be avoided. The technical scheme is as follows: In a first aspect, an embodiment of the present application provides an information transmission method, which is applied to an information transmission system, where the information transmission system includes a first control chip, a second control chip, and a storage chip, the first control chip is connected to the storage chip through a first communication interface, and the second control chip is connected to the storage chip through a second communication interface, where the method includes: When the first control chip monitors that a target pin corresponding to the first communication interface is in a non-occupied state, the first control chip and the storage chip carry out information transmission; And when the second control chip monitors that the target pin corresponding to the second communication interface is in a non-occupied state, the second control chip and the storage chip carry out information transmission. In a second aspect, an embodiment of the present application provides an information transmission device, which is applied to an information transmission system, where the information transmission system includes a first control chip, a second control chip, and a storage chip, the first control chip is connected with the storage chip through a first communication interface, and the second control chip is connected with the storage chip through a second communication interface, where the device includes: the first information transmission module is used for transmitting information between the first control chip and the storage chip when the first control chip monitors that the target pin corresponding to the first communication interface is in a non-occupied state; and the second information transmission module is used for transmitting information between the second control chip and the storage chip when the second control chip monitors that the target pin corresponding to the second communication interface is in a non-occupied state. In a third aspect, an embodiment of the present application provides an electronic device, which may include a processor and a memory, wherein the memory stores a computer program adapted to be loaded by the processor and to perform the method steps of the first aspect described above. The technical scheme provided by the embodiments of the application has the beneficial effects that at least: According to the embodiment, the storage chip is added in the information transmission system with the first control chip and the second control chip in cooperation, when the first control chip monitors that the target pin corresponding to the first communication interface is in the unoccupied state, the first control chip and the storage chip carry out information transmission, and when the second control chip monitors that the target pin corresponding to the second communication interface is in the unoccupied state, the second control chip and the storage chip carry out information transmission. The information to be transmitted between the first control chip and the second control chip can be made to be free of being transmitted through the I2C serial bus or the UART, the storage chip is used as a bridge of the first control chip and the second control chip for information storage, even if the transmitted information is large, the transmission of instructions can not be affected, the communication channel between the first control chip and the second control chip can not be blocked, and further the influence on the communication effect between the first control chip and the second control chi