CN-115380474-B - Power supply modulator and power supply modulation type amplifier

Abstract

The power supply modulator (1) is provided with a1 st switching element (11) having a1 st terminal and a2 nd terminal, the 1 st terminal being applied with a1 st voltage, the 2 nd terminal being connected to an output terminal, and a2 nd switching element (13) having a 3 rd terminal and a 4 rd terminal, the 3 rd terminal being connected to the output terminal and the 2 nd terminal, respectively, and the 4 nd terminal being applied with a2 nd voltage lower than the 1 st voltage. The power source modulator (1) is provided with a1 st drive circuit (15) having a5 th terminal and a 6 th terminal, the 5 th terminal being applied with a1 st voltage, the 6 th terminal being grounded, the resistance value between the 5 th terminal and the 6 th terminal being changed in accordance with the signal level of a pulse width modulation signal, thereby controlling the opening and closing of the 1 st switching element (11), and a2 nd drive circuit (17) having a 7 th terminal and an 8 th terminal, the 7 th terminal being grounded, the 8 th terminal being applied with a2 nd voltage, the resistance value between the 7 th terminal and the 8 th terminal being changed in accordance with the signal level of an inversion signal of the pulse width modulation signal, thereby controlling the opening and closing of the 2 nd switching element (13).

Inventors

• Zhaimuyan
• SAKATA SHUNICHI
• Komatsuzaki Yuuji
• SHINJO SHIATAROU

Assignees

• 三菱电机株式会社

Dates

Publication Date

20260512

Application Date

20200409

Claims (4)

1. 1. A power modulator, wherein, The power modulator is provided with: A1 st switching element having a1 st terminal to which a1 st voltage is applied and a2 nd terminal connected to an output terminal; A2 nd switching element having a3 rd terminal and a 4 th terminal, the 3 rd terminal being connected to the output terminal and the 2 nd terminal, respectively, the 4 th terminal being applied with a2 nd voltage lower than the 1 st voltage; A1 st driving circuit having a5 th terminal to which the 1 st voltage is applied and a 6 th terminal to which the 6 th terminal is grounded, the resistance value between the 5 th terminal and the 6 th terminal being varied in accordance with a signal level of a pulse width modulation signal, thereby controlling the on/off of the 1 st switching element, and A 2 nd driving circuit having a 7 th terminal and an 8 th terminal, the 7 th terminal being grounded, the 8 th terminal being applied with the 2 nd voltage, a resistance value between the 7 th terminal and the 8 th terminal being varied according to a signal level of an inversion signal of the pulse width modulation signal, thereby controlling an on/off of the 2 nd switching element, The 1 st switching element is a1 st transistor, The 1 st terminal is a drain terminal of the 1 st transistor, the 2 nd terminal is a source terminal of the 1 st transistor, The 2 nd switching element is a2 nd transistor, The 3 rd terminal is the drain terminal of the 2 nd transistor, the 4 th terminal is the source terminal of the 2 nd transistor, The 1 st driving circuit is a 3 rd transistor, The gate terminal of the 3 rd transistor is supplied with the pulse width modulated signal, The 5 th terminal is a drain terminal of the 3 rd transistor, the drain terminal of the 3 rd transistor is connected with a gate terminal of the 1 st transistor, The 6 th terminal is the source terminal of the 3 rd transistor, The 2 nd drive circuit is a 4 th transistor, The gate terminal of the 4 th transistor is supplied with an inverted signal of the pulse width modulation signal, The 7 th terminal is the source terminal of the 4 th transistor, The 8 th terminal is the drain terminal of the 4 th transistor, the drain terminal of the 4 th transistor is connected with the gate terminal of the 2 nd transistor, The power modulator is provided with: a1 st resistor, one end of which is connected to the gate terminal of the 1 st transistor and the drain terminal of the 3 rd transistor, respectively; A diode having a cathode terminal connected to the other end of the 1 st resistor and an anode terminal to which a 3 rd voltage is applied; A capacitor having one end connected to the other end of the 1 st resistor and the cathode terminal of the diode, and the other end connected to the source terminal of the 1 st transistor, and And a2 nd resistor having one end connected to the gate terminal of the 2 nd transistor and the drain terminal of the 4 th transistor, respectively, and the other end connected to the source terminal of the 2 nd transistor.
2. 2. A power modulator, wherein, The power modulator is provided with: A1 st switching element having a1 st terminal to which a1 st voltage is applied and a2 nd terminal connected to an output terminal; A2 nd switching element having a3 rd terminal and a 4 th terminal, the 3 rd terminal being connected to the output terminal and the 2 nd terminal, respectively, the 4 th terminal being applied with a2 nd voltage lower than the 1 st voltage; A1 st driving circuit having a5 th terminal to which the 1 st voltage is applied and a 6 th terminal to which the 6 th terminal is grounded, the resistance value between the 5 th terminal and the 6 th terminal being varied in accordance with a signal level of a pulse width modulation signal, thereby controlling the on/off of the 1 st switching element, and A 2 nd driving circuit having a 7 th terminal and an 8 th terminal, the 7 th terminal being grounded, the 8 th terminal being applied with the 2 nd voltage, a resistance value between the 7 th terminal and the 8 th terminal being varied according to a signal level of an inversion signal of the pulse width modulation signal, thereby controlling an on/off of the 2 nd switching element, The 1 st switching element is a1 st transistor, The 1 st terminal is a drain terminal of the 1 st transistor, the 2 nd terminal is a source terminal of the 1 st transistor, The 2 nd switching element is a2 nd transistor, The 3 rd terminal is the drain terminal of the 2 nd transistor, the 4 th terminal is the source terminal of the 2 nd transistor, The 1 st driving circuit is a 3 rd transistor, The gate terminal of the 3 rd transistor is supplied with the pulse width modulated signal, The 5 th terminal is the drain terminal of the 3 rd transistor, The 6 th terminal is the source terminal of the 3 rd transistor, The 2 nd drive circuit is a 4 th transistor, The gate terminal of the 4 th transistor is supplied with an inverted signal of the pulse width modulation signal, The 7 th terminal is the source terminal of the 4 th transistor, The 8 th terminal is the drain terminal of the 4 th transistor, the drain terminal of the 4 th transistor is connected with the gate terminal of the 2 nd transistor, The power modulator is provided with: a 1 st resistor having one end connected to the drain terminal of the 3 rd transistor and the other end connected to the gate terminal of the 1 st transistor; a 5 th transistor having a source terminal connected to the other end of the 1st resistor and a gate terminal of the 1st transistor, a drain terminal connected to the source terminal of the 1st transistor, and a gate terminal connected to one end of the 1st resistor; a2 nd resistor having one end connected to the gate terminal of the 2 nd transistor and the drain terminal of the 4th transistor, respectively, and And a 6 th transistor having a source terminal connected to the other end of the 2 nd resistor, a drain terminal connected to the source terminal of the 2 nd transistor, and a gate terminal connected to one end of the 2 nd resistor.
3. 3. A power modulator, wherein, The power modulator is provided with: A1 st switching element having a1 st terminal to which a1 st voltage is applied and a2 nd terminal connected to an output terminal; A2 nd switching element having a3 rd terminal and a 4 th terminal, the 3 rd terminal being connected to the output terminal and the 2 nd terminal, respectively, the 4 th terminal being applied with a2 nd voltage lower than the 1 st voltage; A1 st driving circuit having a5 th terminal to which the 1 st voltage is applied and a 6 th terminal to which the 6 th terminal is grounded, the resistance value between the 5 th terminal and the 6 th terminal being varied in accordance with a signal level of a pulse width modulation signal, thereby controlling the on/off of the 1 st switching element, and A 2 nd driving circuit having a 7 th terminal and an 8 th terminal, the 7 th terminal being grounded, the 8 th terminal being applied with the 2 nd voltage, a resistance value between the 7 th terminal and the 8 th terminal being varied according to a signal level of an inversion signal of the pulse width modulation signal, thereby controlling an on/off of the 2 nd switching element, The 1 st switching element is a1 st transistor, The 1 st terminal is a drain terminal of the 1 st transistor, the 2 nd terminal is a source terminal of the 1 st transistor, The 2 nd switching element is a2 nd transistor, The 3 rd terminal is the drain terminal of the 2 nd transistor, the 4 th terminal is the source terminal of the 2 nd transistor, The 1 st driving circuit is a 3 rd transistor, The gate terminal of the 3 rd transistor is supplied with the pulse width modulated signal, The 5 th terminal is a drain terminal of the 3 rd transistor, the drain terminal of the 3 rd transistor is connected with a gate terminal of the 1 st transistor, The 6 th terminal is the source terminal of the 3 rd transistor, The 2 nd drive circuit is a 4 th transistor, The gate terminal of the 4 th transistor is supplied with an inverted signal of the pulse width modulation signal, The 7 th terminal is the source terminal of the 4 th transistor, The 8 th terminal is the drain terminal of the 4 th transistor, the drain terminal of the 4 th transistor is connected with the gate terminal of the 2 nd transistor, The power modulator is provided with: a1 st resistor, one end of which is connected to the drain terminal of the 3 rd transistor and the gate terminal of the 1 st transistor, respectively; a5 th transistor having a source terminal connected to the other end of the 1 st resistor and a gate terminal connected to one end of the 1 st resistor; a diode having a cathode terminal connected to the drain terminal of the 5 th transistor and an anode terminal to which a3 rd voltage is applied; A capacitor having one end connected to the drain terminal of the 5 th transistor and the cathode terminal of the diode, and the other end connected to the source terminal of the 1 st transistor; a2 nd resistor having one end connected to the gate terminal of the 2 nd transistor and the drain terminal of the 4th transistor, respectively, and And a 6 th transistor having a source terminal connected to the other end of the 2 nd resistor, a drain terminal connected to the source terminal of the 2 nd transistor, and a gate terminal connected to one end of the 2 nd resistor.
4. 4. A power supply modulation type amplifier, wherein, The power supply modulation type amplifier comprises: a power supply modulator as claimed in any one of claims 1 to 3; A power amplifier for amplifying a high frequency signal related to the pulse width modulation signal, and And a low-pass filter for generating a bias voltage to be supplied to the power amplifier based on a voltage outputted from an output terminal of the power modulator.

Description

Power supply modulator and power supply modulation type amplifier Technical Field The present disclosure relates to a power supply modulator and a power supply modulation type amplifier provided with the power supply modulator. Background The power supply modulation type amplifier may include a power supply modulator that switches a bias voltage of the power amplifier according to a signal level of the high-frequency signal. The power modulator disclosed in non-patent document 1 below includes a1 st transistor, a2 nd transistor, a3 rd transistor, and a4 th transistor. A 1 st voltage, which is a positive voltage, is applied to the drain terminal of the 1 st transistor. The source terminal of the 1 st transistor is connected to the output terminal. The drain terminal of the 2 nd transistor is connected to the source terminal and the output terminal of the 1 st transistor, respectively. The source terminal of transistor 2 is grounded. A2 nd voltage, which is a positive voltage, is applied to the drain terminal of the 3 rd transistor via a resistor. Further, the drain terminal of the 3 rd transistor is connected to the gate terminal of the 1 st transistor. A 5 th voltage as a negative voltage is applied to the source terminal of the 3 rd transistor. A 4 th voltage, which is a positive voltage, is applied to the drain terminal of the 4 th transistor via a resistor. Further, the drain terminal of the 4 th transistor is connected to the gate terminal of the 2 nd transistor. A 5 th voltage, which is a negative voltage, is applied to the source terminal of the 4 th transistor. Prior art literature Non-patent literature Non-patent literature 1：S.Shinjo,et.al."High Speed High Analog Bandwidth Buck Converter Using GaN HEMTs for Envelope Tracking Power Amplifier Applications,"2013IEEE Topical Conference on Wireless Sensors and Sensor Networks Disclosure of Invention Problems to be solved by the invention When the power modulator disclosed in non-patent document 1 is driven, there is a problem in that an external power circuit is provided with 5 power supplies, and the 1 st voltage, the 2 nd voltage, the 3 rd voltage, the 4 th voltage, and the 5 th voltage must be supplied to the power modulator, respectively. The present disclosure has been made to solve the above-described problems, and an object thereof is to provide a power supply modulator capable of reducing the number of power supplies included in an external power supply circuit to less than 5. Means for solving the problems The power supply modulator includes a1 st switching element having a1 st terminal and a 2 nd terminal, the 1 st terminal being applied with a1 st voltage and the 2 nd terminal being connected to an output terminal, a 2 nd switching element having a 3 rd terminal and a 4 th terminal, the 3 rd terminal being connected to the output terminal and the 2 nd terminal, the 4 th terminal being applied with a 2 nd voltage lower than the 1 st voltage, a1 st driving circuit having a 5 th terminal and a 6 th terminal, the 5 th terminal being applied with the 1 st voltage, the 6 th terminal being grounded, a resistance value between the 5 th terminal and the 6 th terminal being varied in accordance with a signal level of a pulse width modulation signal, thereby controlling the opening and closing of the 1 st switching element, and a 2 nd driving circuit having a 7 th terminal and an 8 th terminal, the 7 th terminal being grounded, the 8 th terminal being applied with the 2 nd voltage, a resistance value between the 7 th terminal and the 8 th terminal being varied in accordance with a signal level of an inversion signal of the pulse width modulation signal, thereby controlling the opening and closing of the 2 nd switching element. The 1 st switching element is a1 st transistor, the 1 st terminal is a drain terminal of the 1 st transistor, the 2 nd terminal is a source terminal of the 1 st transistor, the 2 nd switching element is a 2 nd transistor, the 3 rd terminal is a drain terminal of the 2 nd transistor, the 4 th terminal is a source terminal of the 2 nd transistor, the 1 st driving circuit is a 3 rd transistor, a gate terminal of the 3 rd transistor is supplied with a pulse width modulation signal, the 5 th terminal is a drain terminal of the 3 rd transistor, a drain terminal of the 3 rd transistor is connected with a gate terminal of the 1 st transistor, the 6 th terminal is a source terminal of the 3 rd transistor, the 2 nd driving circuit is a 4 th transistor, a gate terminal of the 4 th transistor is supplied with an inversion signal of a pulse width modulation signal, the 7 th terminal is a source terminal of the 4 th transistor, a drain terminal of the 4 th transistor is connected with a gate terminal of the 2 nd transistor, the power source modulator is provided with a1 st resistor, one end of which is connected with a gate terminal of the 1 st transistor and a drain terminal of the 3 rd transistor respectively, the other end of the 1 st resist