CN-115587056-B - DDR4 controller performance optimization method

CN115587056BCN 115587056 BCN115587056 BCN 115587056BCN-115587056-B

Abstract

The invention provides a DDR4 controller performance optimization method, which can acquire the bandwidth conditions of all current ports, check the relation between the real-time bandwidth and the bandwidth threshold value at the moment and record, and adjust the port priority and the bandwidth according to the priority bandwidth policy at the moment if the bandwidth of one port appears for m times continuously to be higher than the upper limit of the bandwidth threshold value or lower than the lower limit of the bandwidth threshold value. The scheme fully considers the inconsistency of access of different ports when the DDR of the system operates and the imbalance of access performance of the ports caused by the change of the current load of the system along with time, dynamically adjusts the priority and the access bandwidth threshold of each port according to real-time monitoring, thereby ensuring the load balance of each port.

Inventors

LIU KAI
WANG PU
SHEN LI

Assignees

山东华芯半导体有限公司

Dates

Publication Date: 20260512
Application Date: 20221020

Claims (6)

1. A method for optimizing performance of a DDR4 controller, comprising the steps of: S1) setting the priority of an nth port as Pn, setting the upper limit and the lower limit of an initialization bandwidth threshold of the nth port as Bn_max and Bn_min respectively, setting the checking time interval as T, and setting the real-time bandwidth of the port checked for the mth time as Bn_m when the same condition occurs for m times continuously, wherein n=1, 2,3, m=1, 2, 3; S2) when triggering the check, obtaining the bandwidth conditions of all the current ports, checking the relationship between the real-time bandwidth and the bandwidth threshold value at the moment and recording; s3) if the bandwidth of one port appears for m times continuously to be higher than the upper limit of the bandwidth threshold or lower than the lower limit of the bandwidth threshold, adjusting the priority and the bandwidth of the port according to the priority bandwidth strategy; the priority bandwidth policy step includes: S31) if the bandwidth of one port appears for m times continuously is higher than the upper limit of the bandwidth threshold, checking the priority of the port, if the priority is not the highest priority, the priority of the port is increased by one level, the bandwidth threshold is unchanged; S32) if the bandwidth of one port continuously appears m times and is lower than the lower limit of the bandwidth threshold, checking the priority of the port, if the priority is not the lowest priority, reducing the priority of the port by one level, and if the priority is the lowest priority, adjusting the bandwidth or the bandwidth threshold according to the bandwidth adjustment strategy.
2. The method of DDR4 controller performance optimization of claim 1, wherein the bandwidth adjustment policy is: And if the bandwidth is lower than the bandwidth threshold lower limit for the m times of continuous occurrence, the bandwidth of the port with the bandwidth higher than the bandwidth threshold upper limit is the lowest priority, the bandwidth of the port with the bandwidth lower than the threshold lower limit is released for other ports to use.
3. The method of DDR4 controller performance optimization of claim 1, wherein the bandwidth of the port bandwidth release that is low priority and has a bandwidth below a lower threshold limit is calculated by the following formula: release bandwidth= (bn_min +) )/2。
4. The method for optimizing performance of the DDR4 controller according to claim 3, wherein the bandwidth release strategy is to release from low to high according to priority in ports with real-time bandwidth lower than a lower threshold and to use from high to low according to priority in ports with real-time bandwidth higher than an upper threshold.
5. The method of optimizing performance of a DDR4 controller of claim 2, wherein the bandwidth adjustment strategy further comprises lowering the bandwidth threshold lower limit for the port if the bandwidth has been lowest priority for m consecutive occurrences of bandwidth below the bandwidth threshold lower limit.
6. The method of DDR4 controller performance optimization of claim 5, wherein the lowest priority bandwidth threshold lower adjustment policy is: The bandwidth threshold lower limit of the port is adjusted to be the maximum value of all real-time bandwidths lower than the bandwidth threshold lower limit in m times of bandwidths.

Description

DDR4 controller performance optimization method Technical Field The invention relates to the field of memory performance optimization, in particular to a DDR4 controller performance optimization method. Background DDR4 typically employs a multi-port architecture, where each port can be set with access priority and bandwidth, and where use is typically initiated with port priority and bandwidth duty cycle. Currently, the port performance influencing factors of the DDR4 mainly comprise priority and bandwidth, the priority determines the execution priority sequence of different port commands, the port bandwidth setting determines the whole bandwidth occupation percentage of each port, the two conditions jointly determine the access performance of each port, and finally the whole performance of DDR access in the system is determined. However, during the running process of the system, the read-write commands of each port come from different external modules, they may happen simultaneously, the access requirement of each port is different, the actual access situation is changed continuously along with the change of the access scene, for example, some scenes require that the access command of the corresponding module of port1 be responded quickly, and other scenes require that the access command of the corresponding module of port2 be responded quickly, and the fixed priority bandwidth policy hardly meets various scene requirements during the running process of the system. Therefore, the conventional scheme sets fixed priority and bandwidth in the initialization process and cannot meet different scenes when the system operates, so that the overall performance of the system can be greatly fluctuated. Disclosure of Invention The invention aims to provide a method for dynamically adjusting DDR4 multi-port performance, which meets the performance requirements of DDR access under different system scenes. The invention aims to achieve the aim, and the aim is achieved by the following technical scheme: a method for optimizing performance of a DDR4 controller, comprising the steps of: s1) setting the priority of an nth port as Pn, setting the upper limit and the lower limit of an initializing bandwidth threshold of the nth port as Bn_max and Bn_min respectively, setting a checking time interval as T, setting that the port real-time bandwidth checked for the mth time is Bn_m when the same condition occurs for m (m=1, 2, 3.); s2) when triggering the checking, obtaining the bandwidth conditions of all the current ports, checking the relation between the real-time bandwidth and the bandwidth threshold value at the moment and recording; S3) if a port appears that the bandwidth is higher than the upper limit of the bandwidth threshold or lower than the lower limit of the bandwidth threshold for m times continuously, the port priority and the bandwidth are adjusted according to the priority bandwidth policy. Preferably, the priority bandwidth policy step includes: S31) if the bandwidth of a port appears m times continuously and is higher than the upper limit of the bandwidth threshold, checking the priority of the port, if the priority is not the highest priority, the priority of the port is increased by one level, the bandwidth threshold is unchanged; s32) if the bandwidth of a port appears m times continuously to be lower than the lower limit of the bandwidth threshold, checking the priority of the port, if the priority is not the lowest priority, reducing the priority of the port by one level, the bandwidth threshold is unchanged, and if the priority is the lowest, adjusting the bandwidth or the bandwidth threshold according to the bandwidth adjustment strategy. Preferably, the bandwidth adjustment policy is: If the port with bandwidth higher than the upper threshold of bandwidth is the highest priority, other port bandwidths with low priority and bandwidth lower than the lower threshold are released for the port to use, and if the port with bandwidth lower than the lower threshold of bandwidth is the lowest priority, the port with low priority is released for other ports to use. Preferably, the bandwidth of the port bandwidth release, which is low priority and has a bandwidth below the lower threshold, is calculated by the following formula: Release bandwidth= (bn_min +) )/2。 Preferably, the strategy of bandwidth release is to release from low to high according to priority in ports with real-time bandwidth lower than the lower threshold limit, and to use from high to low according to priority in ports with real-time bandwidth higher than the upper threshold limit. Preferably, the bandwidth adjustment policy further comprises lowering the bandwidth threshold lower bound for the port if the bandwidth has been lowest priority for m consecutive occurrences of bandwidth below the bandwidth threshold lower bound. Preferably, the bandwidth threshold lower limit adjustment policy of the lowest priority is: The bandwidth threshold lo