CN-115602711-B - Diode device applied to HEMT, preparation method and HEMT

Abstract

The application belongs to the technical field of semiconductors, and provides a diode device applied to an HEMT, a preparation method and the HEMT, wherein the diode device comprises a semiconductor substrate, a first channel layer, a first barrier layer, a plurality of second channel layers, a plurality of second barrier layers, a cap layer, an anode electrode layer, a cathode electrode layer and an insulating medium layer; through arranging a plurality of second channel layers and a plurality of second barrier layers on the first barrier layer in an alternating lamination way so as to form a ladder structure on the first side of the first barrier layer, arranging an anode electrode layer covered on the ladder structure and the cap layer on the first side of the first barrier layer, arranging a cathode electrode layer on the second side of the first barrier layer, and arranging an insulating medium layer between the anode electrode layer and the cathode electrode layer, so that a capacitor between an anode and a cathode has a higher uniform electric field, and meanwhile, the breakdown voltage of a parasitic diode can be improved from the transverse and longitudinal directions, and the problem that the HEMT device is unstable in a high-sensitivity application scene due to the lack of a body diode is solved.

Inventors

• LIU TAO
• HUANG HUIQIN

Assignees

• 天狼芯半导体(成都)有限公司

Dates

Publication Date

20260505

Application Date

20221025

Claims (10)

1. 1. A diode device for HEMT, the diode device comprising: a semiconductor substrate; A first channel layer disposed on the semiconductor substrate; a first barrier layer disposed on the first channel layer; A plurality of second channel layers and a plurality of second barrier layers, wherein the plurality of second channel layers and the plurality of second barrier layers are alternately stacked and arranged on the first barrier layer, the second channel layer at the bottom is arranged on the first barrier layer, and the widths of the plurality of second channel layers and the plurality of second barrier layers are sequentially reduced so as to form a step structure on the first sides of the plurality of second channel layers and the plurality of second barrier layers; The cap layer is arranged on the second barrier layer at the top; The anode electrode layer is arranged on the step structure and the cap layer; A cathode electrode layer disposed on the first channel layer and on second sides of the plurality of second channel layers and the plurality of second barrier layers; And the insulating dielectric layer is arranged on the second barrier layer at the top and positioned between the anode electrode layer and the cathode electrode layer and between the cover cap layer and the cathode electrode layer, wherein the anode electrode layer and the cathode electrode layer are respectively connected with a source electrode and a drain electrode of the HEMT.
2. 2. The diode device of claim 1, wherein a second side of the plurality of second channel layers and the plurality of second barrier layers is flush with a second side of the first barrier layer.
3. 3. The diode device of claim 2, wherein the cathode electrode layer is further disposed on a second side of the first barrier layer and deep into the first channel layer.
4. 4. The diode device of claim 2, wherein a difference between a width of the second barrier layer and a width of the second channel layer on a back side of the second barrier layer is equal to a difference between the second barrier layer and a width of the second channel layer on a front side of the second barrier layer.
5. 5. The diode device of any one of claims 1-4, wherein an upper surface of the insulating dielectric layer is flush with an upper surface of the anode electrode layer.
6. 6. The diode device of any of claims 1-4, wherein a thickness of the second channel layer is the same as a thickness of the second barrier layer.
7. 7. The diode device of any of claims 1-4, wherein the insulating dielectric layer is a high dielectric material.
8. 8. The preparation method of the diode device applied to the HEMT is characterized by comprising the following steps of: Sequentially forming a first channel layer and a first barrier layer on a semiconductor substrate; forming a plurality of second channel layers and a plurality of second barrier layers which are alternately stacked on the first barrier layer, wherein the second channel layer at the bottom is arranged on the first barrier layer, and the widths of the plurality of second channel layers and the plurality of second barrier layers are sequentially reduced so as to form a step structure on first sides of the plurality of second channel layers and the plurality of second barrier layers; forming a cap layer on the second barrier layer on top; forming an anode electrode layer on the stepped structure and the cap layer; forming a cathode electrode layer on the first channel layer, wherein the cathode electrode layer is arranged on a second side of the plurality of second channel layers and the plurality of second barrier layers; An insulating dielectric layer is formed on the second barrier layer on top, the insulating dielectric layer being located between the anode electrode layer and the cathode electrode layer and between the cap layer and the cathode electrode layer.
9. 9. A HEMT, wherein the diode device of any one of claims 1-7 is integrated within the HEMT, or comprises a diode device fabricated by the fabrication method of claim 8.
10. 10. The HEMT of claim 9, wherein the diode device applied to the HEMT is disposed under a gate, a drain, or a source of the HEMT, and wherein the anode electrode layer is connected to the source of the HEMT and the cathode electrode layer is connected to the drain of the HEMT.

Description

Diode device applied to HEMT, preparation method and HEMT Technical Field The application belongs to the technical field of semiconductors, and particularly relates to a diode device applied to a HEMT, a preparation method and the HEMT. Background Gallium nitride (GaN), as a representative of third generation semiconductor materials, has many excellent characteristics, for example, has a high critical breakdown electric field, high electron mobility, high two-dimensional electron gas concentration, good high temperature operation capability, and the like. However, in comparison to silicon-based metal oxide semiconductor field effect transistors (Si-MOSFETs), gallium nitride-based high electron mobility transistor (High Electron Mobility Transistor, HEMT) devices do not have body diodes, and the reverse current generated in high inductance application scenarios can cause device gate voltages to rise, resulting in device damage. Disclosure of Invention In order to solve the technical problems, the embodiment of the application provides a diode device applied to a HEMT, a preparation method and the HEMT, and aims to solve the problem that in the prior art, the gate voltage of the device is increased due to reverse current generated by the HEMT in a high-inductance application scene, so that the device is damaged. A first aspect of an embodiment of the present application provides a diode device applied to a HEMT, where the diode device includes: a semiconductor substrate; A first channel layer disposed on the semiconductor substrate; a first barrier layer disposed on the first channel layer; A plurality of second channel layers and a plurality of second barrier layers, wherein the plurality of second channel layers and the plurality of second barrier layers are alternately stacked and arranged on the first barrier layer, the second channel layer at the bottom is arranged on the first barrier layer, and the widths of the plurality of second channel layers and the plurality of second barrier layers are sequentially reduced so as to form a step structure on the first sides of the plurality of second channel layers and the plurality of second barrier layers; The cap layer is arranged on the second barrier layer at the top; The anode electrode layer is arranged on the step structure and the cap layer; A cathode electrode layer disposed on the first channel layer and on second sides of the plurality of second channel layers and the plurality of second barrier layers; And the insulating dielectric layer is arranged on the second barrier layer at the top and positioned between the anode electrode layer and the cathode electrode layer and between the cover cap layer and the cathode electrode layer, wherein the anode electrode layer and the cathode electrode layer are respectively connected with a source electrode and a drain electrode of the HEMT. In one embodiment, the second sides of the plurality of second channel layers and the plurality of second barrier layers are flush with the second side of the first barrier layer. In one embodiment, the cathode electrode layer is further disposed on the second side of the first barrier layer and extends into the first channel layer. In one embodiment, the difference between the width of the second barrier layer and the width of the second channel layer on the back side of the second barrier layer is equal to the difference between the widths of the second barrier layer and the second channel layer on the front side of the second barrier layer. In one embodiment, the upper surface of the insulating dielectric layer is flush with the upper surface of the anode electrode layer. In one embodiment, the thickness of the second channel layer is the same as the thickness of the second barrier layer. In one embodiment, the insulating dielectric layer is a high dielectric material. The second aspect of the embodiment of the application also provides a preparation method of the diode device applied to the HEMT, which comprises the following steps: Sequentially forming a first channel layer and a first barrier layer on a semiconductor substrate; forming a plurality of second channel layers and a plurality of second barrier layers which are alternately stacked on the first barrier layer, wherein the second channel layer at the bottom is arranged on the first barrier layer, and the widths of the plurality of second channel layers and the plurality of second barrier layers are sequentially reduced so as to form a step structure on first sides of the plurality of second channel layers and the plurality of second barrier layers; forming a cap layer on the second barrier layer on top; forming an anode electrode layer on the stepped structure and the cap layer; forming a cathode electrode layer on the first channel layer, wherein the cathode electrode layer is arranged on a second side of the plurality of second channel layers and the plurality of second barrier layers; An insulating dielectric