CN-115760542-B - Highly integrated graph generating and processing device in head-up display system

CN115760542BCN 115760542 BCN115760542 BCN 115760542BCN-115760542-B

Abstract

The invention provides a highly integrated graph generating and processing device in a head-up display system. The system comprises a drawing instruction Cache module, a graph drawing module, a Cache module, a display output module, a video synchronization module and an image superposition module. The invention is realized based on FPGA, not only has the function of generating graphics, but also integrates the function of correcting picture distortion and the function of superposing images. The invention has the advantages of clear structure, low complexity, high integration level, low delay, low power consumption and the like, and has wide application value in miniaturized head-up display equipment.

Inventors

ZHANG CHUAN
LIANG CHENYU
SU LIN

Assignees

中国航空工业集团公司洛阳电光设备研究所

Dates

Publication Date: 20260505
Application Date: 20221109

Claims (6)

1. The highly integrated graph generating and processing device in the head-up display system is characterized by comprising a drawing instruction Cache module, a graph drawing module, a Cache module, a display output module, a video synchronization module and an image superposition module, wherein all the modules are realized by an FPGA, and the image drawing module and the video synchronization module are respectively integrated with a distortion correction function; The drawing instruction buffer module receives drawing instructions sent by the graphic drawing processor through an external bus, can buffer two frames of drawing instructions at maximum, and sends a switching buffer mark and stores the switching buffer mark into the drawing instruction buffer module after the graphic drawing processor sends one frame of drawing instruction each time; the image drawing module reads the drawing instruction from the drawing instruction Cache module, completes image drawing according to the drawing instruction and performs distortion correction, reads the color value in the current external image video memory address through the Cache module, mixes the color value with the color value of the corresponding pixel point coordinate in the drawing data after the distortion correction according to the transparency coefficient, and then writes the color value into the external image video memory; the distortion correction function in the image drawing module and the video synchronization module refers to performing distortion correction processing on coordinates of drawing data generated by the image drawing module and video data of an external EVS video clock domain, and taking a processed nearest distance coordinate point as a final pixel point coordinate, wherein the distortion correction formula is a fitting equation formula B=f (A) obtained according to distortion characteristics of an optical system, wherein A represents input coordinate data, B represents output coordinate data, and f is a transformation function; The display output module reads drawing data from an external graphic video memory and outputs a display picture to the image superposition module according to a VESA time sequence with set resolution; The video synchronization module carries out distortion correction on video data of an external EVS video clock domain, outputs the video data to the image superposition module, and synchronizes the video data to the clock domain of the display output module; The image superposition module is used for carrying out superposition processing on the synchronized EVS video and the display picture output by the display output module and outputting the display picture, wherein the superposition processing of the image superposition module is carried out pixel-by-pixel superposition calculation according to C= (A+B) -A multiplied by B/255, wherein A is the pixel value of the EVS video, B is the pixel value of the output picture of the display output module, and C is the pixel value of the picture after the superposition processing.
2. A highly integrated graphics-generating and processing apparatus in a heads-up display system as claimed in claim 1, wherein: the external bus is a PCIE or AXI bus.
3. The highly integrated graphic generation and processing apparatus of claim 1, wherein the graphic command includes a set command and a graphic command, the set command includes a parameter setting including a graphic resolution, a windowing, and a blocking area, the graphic command includes a graphic element type drawing command including a dot, a line, a circle, a triangle, a circular arc, a character, and a Bezier curve, and a graphic element drawing parameter including a color, a line width, and a transparency.
4. The apparatus of claim 1, wherein the graphics rendering module reads the graphics command asynchronously with the graphics rendering processor sending the graphics command, wherein when the graphics rendering processor sends the graphics command faster than the graphics rendering module reads the graphics command, two switching cache flags are present in the graphics command cache module, the graphics command cache module no longer receives the graphics command of a new frame until the graphics rendering module reads the switching cache flag, the graphics command cache module accepts the graphics command of the new frame, and when the graphics rendering processor sends the graphics command slower than the graphics rendering module reads the graphics command, the graphics rendering module stops waiting for the graphics rendering processor to send the new graphics command.
5. The device for generating and processing highly integrated graphics in a head-up display system according to claim 1, wherein the external graphics memory is divided into a graphics data buffer A and a graphics data buffer B by a double-buffer mechanism, when the graphics rendering module writes a frame of graphics data into the graphics data buffer A, if the graphics rendering module is reading the graphics data buffer B at this time, the graphics rendering module starts writing the next frame of graphics data into the graphics data buffer B after waiting for the graphics output module to read the graphics data buffer B, otherwise, the graphics rendering module directly writes the next frame of graphics data into the graphics data buffer B, and if the graphics rendering module is writing the graphics data buffer B at this time after the graphics rendering module reads the graphics data buffer A, the graphics output module continues reading the graphics data buffer A, otherwise, the graphics output module reads the graphics data buffer B.
6. The highly integrated graphic generation and processing apparatus of claim 1, wherein the output frames include EVS video, frames output by the display output module, and frames output by the image overlay module.

Description

Highly integrated graph generating and processing device in head-up display system Technical Field The invention belongs to the technical field of graph generation, and particularly relates to a highly integrated graph generation and processing device in a head-up display system. Background And the airborne display system draws a symbol picture according to the received flight parameters and displays the symbol picture through a flat head display. At present, a commercial GPU is adopted to generate a symbol picture, but the commercial GPU has high power consumption and large volume, and meanwhile, an additional circuit is required to realize the functions of distortion correction and image superposition. Accordingly, there is an urgent need for a low power consumption, high integration graphics-generating and processing apparatus for heads-up display systems. Disclosure of Invention In order to overcome the defects in the prior art, the invention provides a highly integrated graph generating and processing device in a head-up display system. The system comprises a drawing instruction Cache module, a graph drawing module, a Cache module, a display output module, a video synchronization module and an image superposition module, and not only has a graph generating function, but also integrates a picture distortion correcting function and an image superposition function. The invention has the characteristics of simple structure, low complexity, high integration level, low delay, power consumption and the like. The highly integrated graph generating and processing device in the head-up display system is characterized by comprising a drawing instruction Cache module, a graph drawing module, a Cache module, a display output module, a video synchronization module and an image superposition module, wherein all the modules are realized by an FPGA, and the image drawing module and the video synchronization module are respectively integrated with a distortion correction function; The drawing instruction buffer module receives drawing instructions sent by the graphic drawing processor through an external bus, can buffer two frames of drawing instructions at maximum, and sends a switching buffer mark and stores the switching buffer mark into the drawing instruction buffer module after the graphic drawing processor sends one frame of drawing instruction each time; the image drawing module reads the drawing instruction from the drawing instruction Cache module, completes image drawing according to the drawing instruction and performs distortion correction, reads the color value in the current external image video memory address through the Cache module, mixes the color value with the color value of the corresponding pixel point coordinate in the drawing data after the distortion correction according to the transparency coefficient, and then writes the color value into the external image video memory; The display output module reads drawing data from an external graphic video memory and outputs a display picture to the image superposition module according to a VESA time sequence with set resolution; The video synchronization module carries out distortion correction on video data of an external EVS video clock domain, outputs the video data to the image superposition module, and synchronizes the video data to the clock domain of the display output module; And the image superposition module is used for superposing the synchronized EVS video and the display picture output by the display output module and outputting the superposed EVS video and the display picture. Specifically, the external bus is a PCIE or AXI bus. Specifically, the drawing command includes a setting command and a graphic command, the setting command mainly includes parameter settings including graphic resolution, windowing and occlusion areas, and the graphic command mainly includes primitive type drawing commands including points, lines, circles, triangles, arcs, characters and Bezier curves and primitive drawing parameters including colors, line widths and transparency. Specifically, the drawing instruction reading of the drawing module and the drawing instruction sending of the drawing processor are asynchronous, when the drawing instruction sending speed of the drawing processor is faster than that of the drawing module, two switching cache marks exist in the drawing instruction cache module at the same time, the drawing instruction cache module does not receive the drawing instruction of a new frame until the drawing module reads out the switching cache mark, the drawing instruction cache module receives the drawing instruction of the new frame again, and when the drawing instruction sending speed of the drawing processor is slower than that of the drawing module, the drawing module stops drawing and waits for the drawing processor to send the new drawing instruction. Specifically, the external graphic display memory is divided into a drawing data buffe