CN-115840668-B - Circuit system applied to micro satellite service computer

CN115840668BCN 115840668 BCN115840668 BCN 115840668BCN-115840668-B

Abstract

The invention discloses a circuit system applied to a micro satellite service computer, which comprises an analog quantity acquisition module, an AD module, an RS422 module, an FPGA and an ARM processor, wherein the analog quantity acquisition module acquires an earth magnetic field and an ambient temperature, the AD module converts analog quantities of the acquired earth magnetic field and the ambient temperature into digital quantities and transmits the digital quantities to an STM32 main control chip, the RS422 module converts a serial port into an RS422 interface and is connected with an RS422 pin, the communication machine transmits an application program through a CAN bus, the FPGA stores the application program into an externally connected FLASH, the FPGA pulls up a BOOT pin of the STM32 main control chip to set a bootstrap mode of the STM32 main control chip, the FPGA transmits a RESET signal, and the STM32 main control chip RESETs and enters the bootstrap program.

Inventors

YU YONGJUN
XU YUAN
LIU KUN
LIAO WENHE

Assignees

南京理工大学

Dates

Publication Date: 20260512
Application Date: 20220922

Claims (4)

1. A circuit system for a micro satellite service computer, comprising: The analog quantity acquisition module is used for acquiring the earth magnetic field and the ambient temperature; The AD module is used for converting analog quantities for acquiring the earth magnetic field and the ambient temperature into digital quantities and transmitting the digital quantities to the STM32 main control chip through the SPI interface; The STM32 main control chip is used for completing the operation of on-board data, and comprises a CAN pin, an SPI pin, an RS422 pin, a debugging interface SWD and TTL-232, and FLASH and SRAM of an on-chip memory; the RS422 module converts the serial port into an RS422 interface and is connected with an RS422 pin; The system is characterized by further comprising an FPGA and an ARM processor; The communication machine sends an application program through the CAN bus, and the FPGA stores the application program into an external FLASH; the FPGA pulls the BOOT pin of the STM32 main control chip high to set the bootstrap mode of the STM32 main control chip; The FPGA sends a RESET signal, and the STM32 main control chip is RESET and enters a bootstrap program; In the bootstrap process, the STM32 main control chip receives a transmission confirmation byte 0x79 signal transmitted by the FPGA from the CAN bus, then the STM32 main control chip generates a receiving response, and the FPGA transmits an application program to the STM32 main control chip through the CAN bus; After the application program is transmitted, the FPGA pulls down the BOOT pin of the STM32 main control chip, at the moment, the RESET signal is sent out again, the STM32 main control chip is started from the FLASH, at the moment, the RESET signal is sent out again, and the STM32 main control chip is started normally.
2. The circuit system applied to the micro satellite service computer according to claim 1, wherein the STM32 main control chip adopts an STM32H743 main control chip, the ARM processor adopts a Cortex-M3 processor, the STM32H743 main control chip is used for completing satellite data operation, and the Cortex-M3 processor is used as a standby main control chip for replacing the STM32H743 main control chip to complete basic satellite data processing function.
3. The circuit system applied to the micro satellite service computer according to claim 1, wherein the analog quantity acquisition module is a triaxial magnetic field sensor and a temperature sensor.
4. The circuitry for a micro-satellite computer according to claim 3, wherein the tri-axial magnetic field sensor reads tri-axial magnetic field strength through the RM3100 chip, transmits data to the STM32 host chip through the SPI bus, and the temperature sensor reads temperature through the TMP175 chip, and transmits temperature data to the STM32H743 host chip through the I 2 C bus.

Description

Circuit system applied to micro satellite service computer Technical Field The invention belongs to the field of embedded micro satellite service computer systems, and particularly relates to a circuit system applied to a micro satellite service computer. Background The space is filled with various particles from the vast universe, such as protons, electrons, a particles, heavy ions, Y rays, etc., and when these high-energy particles bombard a sensitive semiconductor device, the logic circuit of the device is inverted. Some "0" turns over to "1", some "1" turns over to "0", causing errors in the data, a phenomenon known as single event upset. Single event upset affects the reliability of the spacecraft, and if the spacecraft fails in space, the spacecraft cannot be maintained at all, which generally results in failure of the mission. Many accidents occur in the international history of aerospace that result in task failure due to single event upset. At present, in order to solve the problem of failure of an electronic device caused by single event upset in space, some solutions are proposed by domestic and foreign teams. For example, spaceX and Zhejiang university adopt a scheme of multi-FPGA redundancy, the units of Haku, 513, 804 and the like adopt double CPU cold/hot standby, and a single CPU adopts a multi-software fault-tolerant mode. In the existing redundancy architecture method, the dual-machine hot standby and TMR have lower reliability, and data errors are easy to cause. The method of multi-machine backup and hardware three-mode redundancy has high power consumption and complex structure, leads to the abrupt increase of the volume of satellite computer modules, puts forward higher requirements on design and production and manufacture, is not suitable for the technical requirements of microminiaturization of micro-nano satellites, and moreover, the current satellite computer system generally lacks the functions of updating and reconstructing. Disclosure of Invention The invention aims to provide a circuit system applied to a micro satellite service computer, which adopts a 3CPU redundancy and a method for updating and reconstructing through bootstrapping to solve the problem that the reliability of the satellite service computer is reduced due to single-particle inversion of an electronic device in the current space. The technical solution for realizing the purpose of the invention is as follows: A circuit system for a micro satellite service computer, comprising: The analog quantity acquisition module is used for acquiring the earth magnetic field and the ambient temperature; The AD module is used for converting analog quantities for acquiring the earth magnetic field and the ambient temperature into digital quantities and transmitting the digital quantities to the STM32 main control chip through the SPI interface; The STM32 main control chip is used for completing the operation of on-board data, and comprises a CAN pin, an SPI pin, an RS422 pin, a debugging interface SWD and TTL-232, and FLASH and SRAM of an on-chip memory; the RS422 module converts the serial port into an RS422 interface and is connected with an RS422 pin; the system also comprises an FPGA and an ARM processor; The communication machine sends an application program through the CAN bus, and the FPGA stores the application program into an external FLASH; the FPGA pulls the BOOT pin of the STM32 main control chip high to set the bootstrap mode of the STM32 main control chip; The FPGA sends a RESET signal, and the STM32 main control chip is RESET and enters a bootstrap program; in the bootstrap process, the STM32 main control chip receives a transmission confirmation byte 0x79 signal transmitted by the FPGA from the CAN bus, then the STM32 main control chip generates a receiving response, and the FPGA transmits an application program to the STM32 chip through the CAN bus; After the application program is transmitted, the FPGA pulls down the BOOT pin of the STM32 control chip, at the moment, the RESET signal is sent out again, the STM32 main control chip is started from the FLASH, at the moment, the RESET signal is sent out again, and the STM32 main control chip is started normally. Compared with the prior art, the invention has the remarkable advantages that: (1) The invention is based on the design of STM32H743 main control chip and FPGA framework, wherein the FPGA has EDAC function of maintaining memory in real time, the reliability is high, the STM32H743 main control chip has stronger single event upset resistance in the process of storing and transmitting data on the hardware design, the three-mode redundancy wiring design of the input and output of the FPGA, the EDAC interface design of the plug-in SRAM and the interface design of program update reconstruction, and the TMR (three-mode redundancy) and EDAC (error detection and correction) design of the FPGA. (2) The circuit architecture is based on the 3CPU redundancy method, ha