CN-115857808-B - Memory management method, memory storage device and memory control circuit unit

Abstract

The invention provides a memory management method, a memory storage device and a memory control circuit unit. The method includes sending an erase command sequence to indicate to erase a first physical erase unit in the rewritable non-volatile memory module, and sending a write command sequence to indicate to perform a fill write operation on a second physical erase unit in the rewritable non-volatile memory module, corresponding to an erase of the first physical erase unit. The fill write operation is used to store fill data into the second physical erase cell. Therefore, the use efficiency of the physical erasing unit can be improved.

Inventors

• LI WEICHENG
• CHEN BINGZHENG
• SHEN YUZHONG
• XU JIALI

Assignees

• 群联电子股份有限公司

Dates

Publication Date

20260505

Application Date

20221205

Claims (18)

1. 1. A memory management method for a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of physical erase units, and the memory management method comprises: transmitting an erase command sequence, wherein the erase command sequence is used for indicating to erase a first physical erase unit in the plurality of physical erase units, and Before performing a normal write operation on a second physical erase unit associated with the first physical erase unit of the plurality of physical erase units, transmitting a write command sequence corresponding to the erase of the first physical erase unit, wherein the write command sequence is used for indicating to perform a padding write operation on the second physical erase unit, and The fill write operation is to store fill data into the second physical erase unit, the fill data not being mapped by any logical unit.
2. 2. The memory management method of claim 1, further comprising: after the fill write operation is performed, write failure events corresponding to the fill write operation are ignored.
3. 3. The memory management method of claim 1, wherein in the padding write operation, the padding data is stored into one of the second physical erase units.
4. 4. The memory management method of claim 1, wherein the operation of sending the sequence of write instructions corresponding to the erasure of the first physical erased cell comprises: Buffering identification information corresponding to the second physical erased cell corresponding to the erasure of the first physical erased cell; and And before the normal writing operation is executed on the second entity erasing unit, the writing instruction sequence is sent according to the identification information.
5. 5. The memory management method of claim 1, wherein the second physically erased cell comprises at least partially unwritten physically erased cells of the plurality of physically erased cells.
6. 6. The memory management method of claim 1, further comprising: Reading identification information of at least one physically erased cell associated with the first physically erased cell from management information corresponding to erasure of the first physically erased cell, and Determining the second physical erasing unit from the plurality of physical erasing units according to the identification information.
7. 7. A memory storage device, comprising: a connection interface unit for connecting to a host system; A rewritable nonvolatile memory module, wherein the rewritable nonvolatile memory module comprises a plurality of physical erasing units, and A memory control circuit unit connected to the connection interface unit and the rewritable nonvolatile memory module, Wherein the memory control circuit unit is configured to: transmitting an erase command sequence, wherein the erase command sequence is used for indicating to erase a first physical erase unit in the plurality of physical erase units, and Before performing a normal write operation on a second physical erase unit associated with the first physical erase unit of the plurality of physical erase units, transmitting a write command sequence corresponding to the erase of the first physical erase unit, wherein the write command sequence is used for indicating to perform a padding write operation on the second physical erase unit, and The fill write operation is to store fill data into the second physical erase unit, the fill data not being mapped by any logical unit.
8. 8. The memory storage device of claim 7, wherein the memory control circuit unit is further to: after the fill write operation is performed, write failure events corresponding to the fill write operation are ignored.
9. 9. The memory storage device of claim 7, wherein in the fill write operation, the fill data is stored into one of the second physical erase units.
10. 10. The memory storage device of claim 7, wherein the operation of the memory control circuit unit sending the sequence of write instructions corresponding to the erasure of the first physical erase unit comprises: Buffering identification information corresponding to the second physical erased cell corresponding to the erasure of the first physical erased cell; and And before the normal writing operation is executed on the second entity erasing unit, the writing instruction sequence is sent according to the identification information.
11. 11. The memory storage device of claim 7, wherein the second physically erased cell comprises physically erased cells of the plurality of physically erased cells that are at least partially underfilled.
12. 12. The memory storage device of claim 7, wherein the memory control circuit unit is further to: reading identification information of at least one physical erased cell associated with said first physical erased cell from management information corresponding to said erasing of said first physical erased cell, and Determining the second physical erasing unit from the plurality of physical erasing units according to the identification information.
13. 13. A memory control circuit unit for controlling a rewritable nonvolatile memory module, wherein the rewritable nonvolatile memory module comprises a plurality of physical erase units, and the memory control circuit unit comprises: a host interface for connecting to a host system; A memory interface for connecting to the rewritable nonvolatile memory module, and A memory management circuit coupled to the host interface and the memory interface, Wherein the memory management circuit is to: transmitting an erase command sequence, wherein the erase command sequence is used for indicating to erase a first physical erase unit in the plurality of physical erase units, and Before performing a normal write operation on a second physical erase unit associated with the first physical erase unit of the plurality of physical erase units, transmitting a write command sequence corresponding to the erase of the first physical erase unit, wherein the write command sequence is used for indicating to perform a padding write operation on the second physical erase unit, and The fill write operation is to store fill data into the second physical erase unit, the fill data not being mapped by any logical unit.
14. 14. The memory control circuit unit of claim 13, wherein the memory management circuit is further to: after the fill write operation is performed, write failure events corresponding to the fill write operation are ignored.
15. 15. The memory control circuit unit of claim 13, wherein in the fill write operation, the fill data is stored into one of the second physical erase units.
16. 16. The memory control circuit unit of claim 13, wherein the operation of the memory management circuit sending the sequence of write instructions corresponding to the erasure of the first physical erase unit comprises: Buffering identification information corresponding to the second physical erased cell corresponding to the erasure of the first physical erased cell; and And before the normal writing operation is executed on the second entity erasing unit, the writing instruction sequence is sent according to the identification information.
17. 17. The memory control circuit unit of claim 13, wherein the second physically erased cell comprises a physically erased cell of the plurality of physically erased cells that is at least partially unfilled.
18. 18. The memory control circuit unit of claim 13, wherein the memory management circuit is further to: reading identification information of at least one physical erased cell associated with said first physical erased cell from management information corresponding to said erasing of said first physical erased cell, and Determining the second physical erasing unit from the plurality of physical erasing units according to the identification information.

Description

Memory management method, memory storage device and memory control circuit unit Technical Field The present invention relates to a memory management technology, and more particularly, to a memory management method, a memory storage device, and a memory control circuit unit. Background Portable electronic devices such as mobile phones and notebook computers have grown very rapidly over the years, and consumer demand for storage media has also increased rapidly. Since a rewritable nonvolatile memory module (e.g., flash memory) has characteristics of nonvolatile data, power saving, small size, and no mechanical structure, it is very suitable for being built in the various portable electronic devices as exemplified above. Generally, each physical erase unit in a rewritable nonvolatile memory module can be erased and written with data independently. In practice, however, there may be some correlation between physically erased cells A and B in the same rewritable nonvolatile memory module. This correlation results in the write operation to the physical erased cell B failing easily after the physical erased cell A is erased. Accordingly, there is a need to propose a corresponding solution to improve this problem. Disclosure of Invention The invention provides a memory management method, a memory storage device and a memory control circuit unit, which can improve the use efficiency of a physical erasing unit. Example embodiments of the present invention provide a memory management method for a rewritable nonvolatile memory module. The rewritable nonvolatile memory module comprises a plurality of physical erasing units. The memory management method includes sending an erase command sequence, wherein the erase command sequence is used for indicating to erase a first physical erase unit in the plurality of physical erase units, and sending a write command sequence corresponding to the erase of the first physical erase unit, wherein the write command sequence is used for indicating to execute a padding write operation on a second physical erase unit in the plurality of physical erase units. The fill write operation is used to store fill data into the second physical erase cell. In an example embodiment of the present invention, the memory management method further comprises ignoring a write failure event corresponding to the stuff write operation after performing the stuff write operation. In an example embodiment of the invention, the fill data is not mapped by any logical unit. In an example embodiment of the present invention, in the padding write operation, the padding data is stored in one of the second physical program cells. In an exemplary embodiment of the present invention, the operation of transmitting the write command sequence corresponding to the erasure of the first physical erase unit includes buffering identification information corresponding to the second physical erase unit corresponding to the erasure of the first physical erase unit, and transmitting the write command sequence according to the identification information before performing a normal write operation on the second physical erase unit. In an exemplary embodiment of the invention, the second physically erased cell includes physically erased cells at least partially not fully written in the plurality of physically erased cells. In an exemplary embodiment of the invention, the memory management method further includes reading identification information of at least one physical erased cell associated with the first physical erased cell from management information corresponding to erasure of the first physical erased cell, and determining the second physical erased cell from the plurality of physical erased cells according to the identification information. The exemplary embodiments of the present invention further provide a memory storage device, which includes a connection interface unit, a rewritable nonvolatile memory module, and a memory control circuit unit. The connection interface unit is used for being connected to a host system. The rewritable nonvolatile memory module comprises a plurality of physical erasing units. The memory control circuit unit is connected to the connection interface unit and the rewritable nonvolatile memory module. The memory control circuit unit is configured to send an erase command sequence, wherein the erase command sequence is configured to instruct to erase a first physical erase unit of the plurality of physical erase units, and to send a write command sequence, corresponding to an erase of the first physical erase unit, wherein the write command sequence is configured to instruct to perform a padding write operation on a second physical erase unit of the plurality of physical erase units, and the padding write operation is configured to store padding data into the second physical erase unit. In an example embodiment of the present invention, the memory control circuit unit is further configured to ign