CN-115981598-B - Pseudo-random number generator and pseudo-random number generation method

CN115981598BCN 115981598 BCN115981598 BCN 115981598BCN-115981598-B

Abstract

The present disclosure provides a pseudo-random number generator and a pseudo-random number generation method. The pseudo-random number generator comprises a signal mapping circuit, a signal sampling circuit and a signal operation circuit, wherein the signal mapping circuit is used for mapping a plurality of input signals by using a chaotic model to obtain a plurality of chaotic signals with four-wing chaotic states, the signal sampling circuit is electrically connected with the signal mapping circuit and is used for sampling the plurality of chaotic signals to obtain a plurality of state variables corresponding to each chaotic signal in the plurality of chaotic signals, and the signal operation circuit is electrically connected with the signal sampling circuit and is used for carrying out rounding operation on the plurality of state variables corresponding to each chaotic signal to obtain a plurality of random numbers corresponding to the plurality of chaotic signals respectively, and each random number in the plurality of random numbers comprises a plurality of random numbers.

Inventors

YANG YANG
Ma Dehuan
FAN XIAPING
Shi Huihuang

Assignees

海宁奕斯伟集成电路设计有限公司
北京奕斯伟计算技术股份有限公司

Dates

Publication Date: 20260508
Application Date: 20230128

Claims (10)

1. A pseudorandom number generator comprising: The signal mapping circuit is used for mapping a plurality of input signals by using a chaotic model to obtain a plurality of chaotic signals with four-wing chaotic states; the signal sampling circuit is electrically connected with the signal mapping circuit and is used for sampling the plurality of chaotic signals to obtain a plurality of state variables corresponding to each chaotic signal in the plurality of chaotic signals, and The signal operation circuit is electrically connected with the signal sampling circuit and is used for carrying out rounding operation on a plurality of state variables corresponding to each chaotic signal to obtain a plurality of groups of random numbers corresponding to the chaotic signals respectively, and each group of random numbers in the plurality of groups of random numbers comprises a plurality of random numbers; wherein the signal mapping circuit comprises: a signal selection unit for selecting the plurality of input signals based on the chaos model to obtain a plurality of groups of signals, each group of signals of the plurality of groups of signals including at least one input signal of the plurality of input signals, and The plurality of operation channels are electrically connected with the signal selection unit and are used for respectively carrying out mapping operation on a plurality of groups of signals based on the chaotic model to obtain a plurality of chaotic signals; The signal selection unit is further configured to select the plurality of chaotic signals based on the chaotic model to obtain a plurality of sets of signals, and send the plurality of sets of signals to the plurality of operation channels respectively, where each set of signals of the plurality of sets of signals includes at least one chaotic signal of the plurality of chaotic signals, when it is determined that the number of mapping operations of the plurality of operation channels is less than a preset number of times; each of the plurality of operation channels includes: The first inverter is used for carrying out inverse summation operation on one group of signals of the plurality of groups of signals to obtain a first operation result; An inverting integrator electrically connected with the first inverter for performing inverting integration operation on the first operation to obtain a second operation result, and And the second inverter is electrically connected with the inverting integrator and is used for performing inverting proportion operation on the second operation result to obtain the chaotic signal.
2. The pseudorandom number generator of claim 1 wherein the signal mapping circuit further comprises: the signal generating unit is electrically connected with the plurality of operation channels and is used for generating a plurality of initial signals; The plurality of operation channels are further used for respectively carrying out mapping operation on a plurality of groups of signals based on the chaotic model to obtain a plurality of chaotic signals, and each group of signals of the plurality of groups of signals comprises at least one initial signal of the plurality of initial signals.
3. The pseudo-random number generator of claim 2, wherein the signal generation unit comprises: And the plurality of direct current power supplies are used for generating a plurality of initial signals based on the plurality of initial voltage values respectively.
4. The pseudo-random number generator of one of claims 1 to 3, wherein the chaotic model comprises a four-dimensional chaotic model, the plurality of input signals comprises a first input signal, a second input signal, a third input signal, and a fourth input signal, the plurality of chaotic signals comprises a first chaotic signal, a second chaotic signal, a third chaotic signal, and a fourth chaotic signal, the four-dimensional chaotic model comprises: a mapping relationship between the first chaotic signal and the first, second and third input signals; A mapping relationship between the second chaotic signal and the first, second and third input signals; a mapping relation between the third chaotic signal and the first input signal, the second input signal, the third input signal and the fourth input signal, and And the mapping relation between the fourth chaotic signal and the second input signal, the third input signal and the fourth input signal.
5. The pseudo-random number generator of claim 2, wherein the plurality of chaotic signals output through the N-time mapping operation are correlated with the plurality of chaotic signals output through the N-1-time mapping operation, N = 1,2, & gt, N being a positive integer and N being a preset number of times; when n=1, the plurality of chaotic signals output through the mapping operation N-1 times are the plurality of initial signals.
6. The pseudorandom number generator of claim 1 wherein the signal sampling circuit comprises: A front-end conditioning unit for conditioning the waveforms and amplitudes of the plurality of chaotic signals respectively, and The sampling unit is used for respectively converting the conditioned plurality of chaotic signals into digital signals from analog signals, and sampling the digital signals at a preset frequency to obtain a plurality of state variables corresponding to each chaotic signal in the plurality of chaotic signals.
7. The pseudo-random number generator of claim 6, wherein the sampling unit is further configured to sample the digital signal at the preset frequency for 3f+d times to obtain 3f+d state variables corresponding to each of the plurality of chaotic signals, where f is the preset frequency and D is the number of random numbers of each set of random numbers.
8. The pseudo-random number generator of claim 1, wherein the signal operation circuit comprises a micro control unit, and the micro control unit is used for performing rounding operation on a plurality of state variables corresponding to each chaotic signal by using a rounding model to obtain a plurality of random number sequences corresponding to the chaotic signals respectively.
9. The pseudorandom number generator of claim 8 wherein the signal operation circuit further comprises a test unit electrically connected to the microcontroller unit for converting the sequence of random numbers into a bit stream for randomness testing of the bit stream; Wherein, under the condition that the randomness test results all meet the randomness requirement, the micro-control unit is further used for outputting the random number sequences.
10. A pseudo-random number generation method, comprising: The signal mapping circuit maps a plurality of input signals by using a chaotic model to obtain a plurality of chaotic signals with four-wing chaotic states; The signal sampling circuit samples the plurality of chaotic signals to obtain a plurality of state variables corresponding to each chaotic signal in the plurality of chaotic signals, and The signal operation circuit performs rounding operation on a plurality of state variables corresponding to each chaotic signal to obtain a plurality of groups of random numbers corresponding to the chaotic signals respectively, wherein each group of random numbers in the plurality of groups of random numbers comprises a plurality of random numbers; wherein the signal mapping circuit comprises: a signal selection unit for selecting the plurality of input signals based on the chaos model to obtain a plurality of groups of signals, each group of signals of the plurality of groups of signals including at least one input signal of the plurality of input signals, and The plurality of operation channels are electrically connected with the signal selection unit and are used for respectively carrying out mapping operation on a plurality of groups of signals based on the chaotic model to obtain a plurality of chaotic signals; The signal selection unit is further configured to select the plurality of chaotic signals based on the chaotic model to obtain a plurality of sets of signals, and send the plurality of sets of signals to the plurality of operation channels respectively, where each set of signals of the plurality of sets of signals includes at least one chaotic signal of the plurality of chaotic signals, when it is determined that the number of mapping operations of the plurality of operation channels is less than a preset number of times; each of the plurality of operation channels includes: The first inverter is used for carrying out inverse summation operation on one group of signals of the plurality of groups of signals to obtain a first operation result; An inverting integrator electrically connected with the first inverter for performing inverting integration operation on the first operation to obtain a second operation result, and And the second inverter is electrically connected with the inverting integrator and is used for performing inverting proportion operation on the second operation result to obtain the chaotic signal.

Description

Pseudo-random number generator and pseudo-random number generation method Technical Field The present disclosure relates to the field of information security technology, and more particularly, to a pseudo-random number generator and a pseudo-random number generation method. Background Random numbers are commonly used to participate in the design of encryption systems. The random performance of the random numbers generated by the random number generator plays a vital role in the security of the encryption system. The random performance of a pseudorandom number generator based on chaos theory depends on the dynamic behavior of a chaos model. For example, the dimensions of the chaotic model, etc. Pseudo-random number generators typically use low-dimensional mapping to generate pseudo-random numbers with a two-winged chaotic effect. Such as tent maps, ernon maps, logistic maps, etc. But the pseudo random number with double-wing chaotic effect generated based on the low-dimensional chaotic model has poor ergodic property and is easy to be broken, so that the encryption system has potential safety hazard. Disclosure of Invention The present disclosure provides a pseudo-random number generator and a pseudo-random number generation method. According to one aspect of the disclosure, a pseudo-random number generator is provided, and includes a signal mapping circuit configured to map a plurality of input signals using a chaotic model to obtain a plurality of chaotic signals having four-wing chaotic states, a signal sampling circuit electrically connected to the signal mapping circuit and configured to sample the plurality of chaotic signals to obtain a plurality of state variables corresponding to each of the plurality of chaotic signals, and a signal operation circuit electrically connected to the signal sampling circuit and configured to perform a rounding operation on the plurality of state variables corresponding to each of the plurality of chaotic signals to obtain a plurality of sets of random numbers corresponding to the plurality of chaotic signals, respectively, wherein each set of random numbers in the plurality of sets of random numbers includes a plurality of random numbers. The signal mapping circuit comprises a signal selection unit and a plurality of operation channels, wherein the signal selection unit is used for selecting a plurality of input signals based on a chaotic model to obtain a plurality of groups of signals, each group of signals of the plurality of groups of signals comprises at least one input signal of the plurality of input signals, the plurality of operation channels are electrically connected with the signal selection unit and are used for respectively carrying out mapping operation on the plurality of groups of signals based on the chaotic model to obtain a plurality of chaotic signals, and the signal selection unit is further used for selecting the plurality of chaotic signals based on the chaotic model to obtain a plurality of groups of signals and respectively sending the plurality of groups of signals to the plurality of operation channels when the number of mapping operation times of the plurality of operation channels is smaller than a preset number of times. For example, each of the plurality of operation channels includes a first inverter for performing an inverse summation operation on a set of signals of the plurality of sets of signals to obtain a first operation result, an inverse integrator electrically connected to the first inverter for performing an inverse integration operation on the first operation to obtain a second operation result, and a second inverter electrically connected to the inverse integrator for performing an inverse proportional operation on the second operation result to obtain the chaotic signal. The signal mapping circuit further comprises a signal generating unit electrically connected with the plurality of operation channels and used for generating a plurality of initial signals, wherein the plurality of operation channels are further used for respectively carrying out mapping operation on the plurality of groups of signals based on the chaotic model to obtain a plurality of chaotic signals, and each group of signals of the plurality of groups of signals comprises at least one initial signal of the plurality of initial signals. For example, the signal generating unit includes a plurality of direct current power supplies for generating a plurality of initial signals based on a plurality of initial voltage values, respectively. For example, the chaotic model includes a four-dimensional chaotic model including a first input signal, a second input signal, a third input signal, and a fourth input signal, and the plurality of chaotic signals including the first chaotic signal, the second chaotic signal, the third chaotic signal, and the fourth chaotic signal, and the four-dimensional chaotic model includes a mapping relationship between the first chao