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CN-116053125-B - Surface acoustic wave temperature compensation filter wafer cut by using plasma

CN116053125BCN 116053125 BCN116053125 BCN 116053125BCN-116053125-B

Abstract

The invention provides a surface acoustic wave temperature compensation filter wafer using plasma cutting, which can complete cutting by using a plasma cutting process, can ensure that the plasma cutting process does not damage other areas of a chip, can ensure that defects caused by plasma cutting can be clearly checked in a subsequent automatic optical checking process, and is characterized in that: the filter wafer includes: a substrate layer, a temperature compensation layer, a piezoelectric film layer, a functional layer and a dicing channel protective layer; the dicing street protection layer is specifically a metal layer surrounding a single chip unit.

Inventors

  • ZHANG XU

Assignees

  • 全讯射频科技(无锡)有限公司

Dates

Publication Date
20260512
Application Date
20220318

Claims (10)

  1. 1. The surface acoustic wave temperature compensation filter wafer cut by using plasma is characterized by comprising a base material layer, a temperature compensation layer, a piezoelectric film layer, a functional layer and a cutting channel protection layer, wherein the cutting channel protection layer is a metal layer which surrounds a single chip unit; The gap between the cutting channel protective layer and the cutting channel protective layer of the adjacent chip unit is 20-50 um, and the cutting channel protective layer is made of any one of Al, cu and Ni; the thickness of the metal layer is adjusted according to the height of the internal structure of the chip, so that the adhesion effect of the thermoplastic film on the surface of the wafer is achieved; the wafer cutting method comprises the steps of firstly attaching a thermoplastic film from the front surface of a wafer, then coating a protective liquid and pre-slotting a cutting channel from the back surface of the wafer, and finally etching from a pre-slotting area of the back surface of the wafer in plasma enhanced dry etching equipment; The temperature compensation layer is of a multilayer structure, and the multilayer structure is respectively a first silicon oxide layer, a silicon oxyfluoride layer and a second silicon oxide layer from bottom to top.
  2. 2. The surface acoustic wave temperature compensating filter wafer using plasma cutting as claimed in claim 1, wherein the thickness of the metal layer is 0.5-5 um, and the width of the metal layer is 2-8 um.
  3. 3. The surface acoustic wave temperature compensating filter wafer using plasma cutting as claimed in claim 1, wherein the substrate layer is made of silicon and has a thickness of 500-700 um.
  4. 4. The surface acoustic wave temperature compensating filter wafer using plasma cutting as claimed in claim 1, wherein the thickness of the first silicon oxide layer is 100-200 nm, the thickness of the silicon oxyfluoride layer is 100-300 nm, and the thickness of the second silicon oxide layer is 50-200 nm.
  5. 5. The surface acoustic wave temperature compensating filter wafer using plasma cutting as claimed in claim 1, wherein the piezoelectric film layer is made of lithium tantalate, and the thickness of the piezoelectric film layer is 1000-5000 nm.
  6. 6. The surface acoustic wave temperature compensating filter wafer using plasma cutting according to claim 1, wherein the functional layer comprises an interdigital circuit layer and a bonding pad, the interdigital circuit layer is made of one or more composite layers of Al, cu, au, pt, the bonding pad is made of a metal composite layer, the thicknesses of the metal composite layers are respectively Al, ti, ni, cu, au from bottom to top, the thicknesses of the metal composite layer are respectively Al 2-4 um, ti 100-500 nm, ni 200-1000 nm, cu 300-1000 nm, au 100-500 nm, the number of the bonding pads in a single chip unit is multiple, the bonding pad is rectangular with semicircular ends, the straight edge of the rectangle is 20-100 um, the diameter of the semicircle at the two ends is 50-100 um, and the gap between the outermost edge of the bonding pad and the edge of the chip after cutting is larger than 50um.
  7. 7. The surface acoustic wave temperature compensating filter wafer of claim 2 wherein the scribe line protection layer is deposited onto the surface of the substrate layer by physical vapor deposition.
  8. 8. The surface acoustic wave temperature compensating filter wafer using plasma dicing as set forth in claim 4, wherein the temperature compensating layer is etched away by a dry etching process after forming a uniform film on the surface of the substrate layer by a plasma enhanced vapor deposition method to expose the surface of the substrate.
  9. 9. The surface acoustic wave temperature compensating filter wafer using plasma cutting as claimed in claim 6, wherein the interdigital circuit layer is evaporated on the surface of the piezoelectric film layer by physical vapor deposition, and then is manufactured into a circuit structure by wet etching, and a metal circuit of the interdigital circuit layer is connected with a bonding pad through a metal lead-out wire in the interdigital circuit layer.
  10. 10. The surface acoustic wave temperature compensating filter wafer of claim 6 wherein the piezoelectric film layer is grown in the interdigital circuit layer region of the corresponding chip by plasma enhanced chemical vapor deposition.

Description

Surface acoustic wave temperature compensation filter wafer cut by using plasma Technical Field The invention relates to the technical field of filter wafers, in particular to a surface acoustic wave temperature compensation filter wafer cut by using plasma. Background For the filter chip, a method of grinding wheel cutting is generally used for cutting the filter wafer at present, but because a large amount of broken edges are caused in the grinding wheel cutting process, a part of areas of the filter chip are usually reserved in the design process to avoid the influence of broken edges on the functional area, so that the waste of wafer materials is caused. With the development of plasma dicing technology, some filter wafers have been diced by using a plasma dicing method, and since the plasma dicing method is a process of etching and separating a substrate by using plasma chemical etching, the chip structure of the wafer needs to be specifically designed for the process at the design end of a product, so that the effect of ensuring that the etching chemical reaction is successfully completed and ensuring that other areas are not affected by etching can be achieved. Disclosure of Invention In order to solve the problem that the chip structure of the wafer needs to be specifically designed for the plasma cutting process in the above description so as to ensure that the etching chemical reaction is successfully completed and that other areas of the chip are not affected by etching, the invention provides the surface acoustic wave temperature compensation filter wafer using plasma cutting, which can complete cutting by using the plasma cutting process, and can ensure that the plasma cutting process does not damage other areas of the chip and can clearly check defects caused by plasma cutting in the subsequent automatic optical inspection process. The technical scheme is as follows: A surface acoustic wave temperature compensation filter wafer cut by using plasma is characterized by comprising a base material layer, a temperature compensation layer, a piezoelectric film layer, a functional layer and a cutting channel protection layer, wherein the cutting channel protection layer is specifically a metal layer surrounding a single chip unit. Further, the thickness of the metal layer is 0.5-5 um, the width of the metal layer is 2-8 um, the gap between the dicing channel protective layer and the dicing channel protective layer of the adjacent chip unit is 20-50 um, the dicing channel protective layer is made of any one of Al, cu and Ni, and the dicing channel protective layer is evaporated to the surface of the substrate layer by using a physical vapor deposition method. Further, the substrate layer is made of silicon, and the thickness of the substrate layer is 500-700 um. Further, the temperature compensation layer is of a multi-layer structure, and the multi-layer structure is respectively a first silicon oxide layer, a silicon oxyfluoride layer and a second silicon oxide layer from bottom to top. Further, the thickness of the first silicon oxide layer is 100-200 nm, the thickness of the fluorine silicon oxide layer is 100-300 nm, the thickness of the second silicon oxide layer is 50-200 nm, and the temperature compensation layer is etched and stripped by a dry etching process after a uniform film is formed on the surface of the substrate layer by a plasma enhanced vapor deposition method, and the temperature compensation layer in the cutting channel area is exposed out of the surface of the substrate. Further, the functional layer comprises an interdigital circuit layer and a bonding pad, wherein the interdigital circuit layer is made of one or more composite layers in Al, cu, au, pt, the interdigital circuit layer is evaporated on the surface of the piezoelectric film layer through a physical vapor deposition method, then a circuit structure is manufactured through a wet etching process, the bonding pad is made of a metal composite layer, the thicknesses of the metal composite layers are Al, ti, ni, cu, au from bottom to top respectively, the thicknesses of the metal composite layer are respectively Al 2-4 um, ti 100-500 nm, ni 200-1000 nm, cu 300-1000 nm and Au 100-500 nm, a metal circuit of the interdigital circuit layer is connected with the bonding pad through metal outgoing lines in the interdigital circuit layer, the number of the bonding pad in a single chip unit is 4 or more, the bonding pad is in a semicircular rectangle shape at two ends, the straight edge of the rectangle is 20-100 um, the diameter of the semicircle at two ends is 50-100 um, and the edge clearance of the chip after the edge of the bonding pad is cut is greater than 50um. Further, the piezoelectric film layer is made of lithium tantalate, the thickness of the piezoelectric film layer is 1000-5000 nm, and the piezoelectric film layer grows in the interdigital circuit layer area of the corresponding chip through a plasma enhanced chem