CN-116108785-B - Remote verification method and system for verifying public cloud platform based on multiple FPGA
Abstract
The invention discloses a remote verification method and a remote verification system based on a public cloud platform with multiple FPGAs, which comprise the steps of selecting a corresponding resource configuration module from a plurality of candidate resource configuration templates provided by the cloud platform by a user, receiving a design source file uploaded by the user through an encryption channel, executing logic synthesis, probe insertion, division, mapping and top module generation operation to complete simulation configuration, acquiring and calling computing resources from a computing cluster, generating a bit stream file according to the simulation configuration, distributing the corresponding resources from a resource pool according to the simulation configuration, configuring a switching architecture routing table, connecting the resources corresponding to the simulation configuration, constructing a hard simulation execution environment, loading the generated bit stream file to an FPGA chip distributed to the user, configuring a peripheral interface board, connecting a debugging machine to a peripheral and enabling the debugging machine to be ready, and executing simulation and debugging operation by the user through a virtual network computing protocol to obtain waveform data to complete remote verification.
Inventors
- YANG MINGJUN
Assignees
- 湖南泛联新安信息科技有限公司
Dates
- Publication Date
- 20260505
- Application Date
- 20230310
Claims (10)
- 1. The remote verification method for verifying the public cloud platform based on the multi-FPGA is characterized by comprising the following steps of: S100, selecting a corresponding resource configuration module from a plurality of candidate resource configuration templates provided by a cloud platform by a user, receiving a design source file uploaded by the user through an encryption channel, and executing logic synthesis, probe insertion, division, mapping and top module generation operation on the design source file to complete simulation configuration, wherein the simulation configuration comprises an FPGA chip, a peripheral interface board, a peripheral and a debugging machine; S200, the cloud platform acquires and invokes computing resources from a computing cluster, and generates a bit stream file according to the simulation configuration; S300, the cloud platform allocates corresponding resources from a resource pool according to the simulation configuration, configures a switching architecture routing table, connects the resources corresponding to the simulation configuration, and constructs a hard simulation execution environment; s400, the cloud platform respectively writes the generated bit stream files into FPGA chips distributed to the users, configures a peripheral interface board, and connects a debugging machine to a peripheral and makes the debugging machine ready; S500, a user enters the hard simulation execution environment, remotely logs in the debugging machine through a virtual network computing protocol, calls an application program and a bottom layer driver to execute simulation and debugging operations to obtain waveform data, and completes remote verification.
- 2. The method of claim 1, wherein S100 comprises: s110, a user selects a corresponding resource configuration template from a plurality of candidate resource configuration templates provided by a cloud platform, receives a design source file uploaded by the user through an encryption channel, designates a top module of an original design by the user through the cloud platform, adds a preset design source file into a file list, and receives a comprehensive starting instruction of the user to start a logic comprehensive process on the file list to obtain a comprehensive result; S120, a user obtains an example and a signal tree from the comprehensive result, and a cloud platform selects a debugging signal through multi-FPGA prototype verification; s130, a user divides and port maps the circuit design according to the logic relation among the circuit design modules and the expected available FPGA resources through the cloud platform to obtain division and mapping results; And S140, the cloud platform generates a new top module according to the debugging signals and the dividing and mapping results, and inserts the debugging module and the clock module into the new top module to complete simulation configuration, wherein the simulation configuration comprises an FPGA chip, a peripheral interface board, a peripheral and a debugging machine.
- 3. The method of claim 1, wherein S110 further comprises, after: When the user fails to find the corresponding resource allocation template, the user informs the cloud platform service provider of expanding resources through the cloud platform, and the resource allocation template is newly added.
- 4. The method of claim 3, wherein the cloud platform configures corresponding resources for resource requirements involved in an added resource configuration template, wherein the configured corresponding resources include an added debugger operating system type and version and an added peripheral and adapt to a peripheral interface board.
- 5. The method of claim 1, wherein S200 further comprises uploading the bitstream file to a storage cluster and/or deleting a user design source file, reclaiming computing resources.
- 6. The method of claim 1, wherein S100 further comprises: the cloud platform respectively presets a group of configurations aiming at a plurality of preset hard simulation verification scenes, allocates a group of resource pools for each configuration, comprises computing resources, an FPGA chip, a peripheral interface board, peripherals and a debugging machine, wherein the plurality of hard simulation verification scenes comprise a single chip with a first preset size, a single board with a second preset size, four chips with the second preset size and multiple boards with a third preset size, the first preset size is smaller than the second preset size, and the second preset size is smaller than the third preset size.
- 7. The method of claim 1, wherein S500 further comprises, after: and S600, storing the waveform data into a storage cluster, exiting the hard simulation execution environment, and ending the simulation.
- 8. The method of claim 1, wherein S600 further comprises, after: and the cloud platform recovers FPGA resources, resets the routing configuration of the switching architecture and resets the debugger system.
- 9. A remote verification system for verifying a public cloud platform based on multiple FPGAs, comprising a multiple FPGA verification public cloud platform for performing the method of any of claims 1 to 8.
- 10. The system of claim 9, wherein the multi-FPGA authenticated public cloud platform comprises an API gateway, a computing cluster connected to the API gateway, an FPGA cluster connected to the computing cluster, and a storage cluster.
Description
Remote verification method and system for verifying public cloud platform based on multiple FPGA Technical Field The invention belongs to the technical field of electronic design automation, and particularly relates to a remote verification method and system for verifying a public cloud platform based on multiple FPGAs. Background Currently, global verification for large-scale hardware design often uses multiple high-performance FPGAs (field programmable gate arrays) to cooperatively complete verification. Chip design institutions with general technical capabilities generally choose to self-build an FPGA verification platform according to their own needs. However, the construction mode is often expensive, the construction period is long, and most importantly, the technical requirements on the design and verification team are extremely high. Therefore, a solution is needed to solve the above problems. Disclosure of Invention Aiming at the technical problems, the invention provides a remote verification method and a remote verification system for verifying a public cloud platform based on multiple FPGAs. The technical scheme adopted for solving the technical problems is as follows: A remote verification method for verifying a public cloud platform based on multiple FPGA comprises the following steps: S100, selecting a corresponding resource configuration module from a plurality of candidate resource configuration templates provided by a cloud platform by a user, receiving a design source file uploaded by the user through an encryption channel, and executing logic synthesis, probe insertion, division, mapping and top module generation operation on the design source file to complete simulation configuration, wherein the simulation configuration comprises an FPGA chip, a peripheral interface board, a peripheral and a debugging machine; s200, the cloud platform acquires and invokes computing resources from a computing cluster, and generates a bit stream file according to simulation configuration; S300, the cloud platform allocates corresponding resources from the resource pool according to the simulation configuration, configures a switching architecture routing table, connects the resources corresponding to the simulation configuration, and constructs a hard simulation execution environment; s400, the cloud platform respectively writes the generated bit stream files into FPGA chips distributed to users, configures a peripheral interface board, connects a debugging machine to a peripheral and enables the debugging machine to be ready; s500, a user enters a hard simulation execution environment, remotely logs in a debugging machine through a virtual network computing protocol, calls an application program and a bottom layer driver to execute simulation and debugging operations to obtain waveform data, and completes remote verification. Preferably, S100 includes: S110, a user selects a corresponding resource configuration template from a plurality of candidate resource configuration templates provided by a cloud platform, receives a design source file uploaded by the user through an encryption channel, designates a top module of an original design by the user through the cloud platform, adds a preset design source file into a file list, and receives a comprehensive starting instruction of the user to start a logic comprehensive process on the file list to obtain a comprehensive result; S120, a user obtains an example and a signal tree from the comprehensive result, and verifies the cloud platform to select a debugging signal through a multi-FPGA prototype; S130, a user divides and port maps the circuit design through a cloud platform according to the logic relation among the circuit design modules and the expected available FPGA resources to obtain division and mapping results; and S140, the cloud platform generates a new top module according to the debugging signals, the dividing and mapping results, and inserts the debugging module and the clock module into the new top module to complete simulation configuration, wherein the simulation configuration comprises an FPGA chip, a peripheral interface board, a peripheral and a debugging machine. Preferably, S110 further comprises: when the user fails to find the corresponding resource allocation template, the user informs the cloud platform service provider of expanding resources through the cloud platform, and the resource allocation template is newly added. Preferably, the cloud platform configures corresponding resources according to resource requirements related in the newly-added resource configuration template, wherein the correspondingly-configured resources comprise the newly-added debugging machine operating system type and version and the newly-added peripheral and are adapted to a peripheral interface board. Preferably, S200 further comprises uploading the bitstream file to a storage cluster and/or deleting the user design source file, reclaiming computing r