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CN-116110971-B - Semiconductor device and manufacturing method thereof

CN116110971BCN 116110971 BCN116110971 BCN 116110971BCN-116110971-B

Abstract

The application discloses a semiconductor device and a method for manufacturing the same, the doping concentration of the P column of the epitaxial layer of the semiconductor device, which is close to the substrate, is greater than that of the N column. Therefore, under the high-temperature processes such as annealing, oxidation and the like, the doping concentration of the P column and the doping concentration of the N column, which are formed by diffusing part of impurities in the substrate to the bottom of the epitaxial layer of the N column region, are equivalent, so that positive carriers and load carriers of the P column and the N column are mutually depleted at the bottom of the epitaxial layer as much as possible, and the performance of the semiconductor device is further improved.

Inventors

  • LI XIAN
  • CAO WENKANG

Assignees

  • 杭州富芯半导体有限公司

Dates

Publication Date
20260512
Application Date
20230209

Claims (10)

  1. 1. A method of manufacturing a semiconductor device, wherein the semiconductor device is a superjunction VDMOS device, the method comprising: forming a second epitaxial layer on the substrate, wherein the doping concentration of the second epitaxial layer is the first doping concentration; Grooving the second epitaxial layer to obtain a plurality of second P grooves; injecting P column materials with second doping concentration into each second P groove to obtain second P columns which are arranged at intervals, wherein second epitaxial layer parts between the second P columns form second N columns; forming a first epitaxial layer on the second epitaxial layer, wherein the doping concentration of the first epitaxial layer is the same as that of the second epitaxial layer; Grooving is carried out on the first epitaxial layer, so that a plurality of first P grooves are obtained; injecting P column materials with the first doping concentration into each first P groove to obtain first P columns which are arranged at intervals; Wherein the first doping concentration is less than the second doping concentration.
  2. 2. The method of manufacturing of claim 1, wherein the implanting P-pillar material of the second doping concentration into the second P-trench to obtain a second P-pillar comprises: and injecting a gaseous P column material into the second P groove by using a chemical vapor deposition process, and enabling the P column material to reach a second doping concentration by adjusting the airflow velocity of the P column material and/or adjusting the speed of the doping airflow.
  3. 3. A method of manufacturing a semiconductor device, wherein the semiconductor device is a superjunction VDMOS device, the method comprising: Forming a second epitaxial layer on the substrate to enable the doping concentration of the second epitaxial layer to reach a fourth doping concentration, wherein the second epitaxial layer is an N-type epitaxial layer; forming a first epitaxial layer on the second epitaxial layer to enable the doping concentration of the first epitaxial layer to reach a third doping concentration, wherein the first epitaxial layer is an N-type epitaxial layer; Grooving is carried out on the first epitaxial layer, and a plurality of P grooves are obtained through the first epitaxial layer and enter the second epitaxial layer; injecting P column materials with the third doping concentration into each P groove to obtain P columns which are arranged at intervals, wherein a first epitaxial layer part between the P columns forms a first N column, and a second epitaxial layer part between the P columns forms a second N column; wherein the third doping concentration is greater than the fourth doping concentration.
  4. 4. A semiconductor device comprising a substrate, an epitaxial layer, and N-pillars and P-pillars alternately arranged within the epitaxial layer, wherein the semiconductor device is fabricated using the fabrication method of any one of claims 1-3; the epitaxial layer comprises a first epitaxial layer and a second epitaxial layer, and the second epitaxial layer is positioned below the first epitaxial layer and adjacent to the substrate; In the first epitaxial layer, the doping concentration of the P column is equal to that of the N column; and in the second epitaxial layer, the doping concentration of the P column is larger than that of the N column.
  5. 5. The semiconductor device according to claim 4, wherein, The P column comprises a first P column located in the first epitaxial layer and a second P column located in the second epitaxial layer, and the doping concentration of the second P column is larger than that of the first P column.
  6. 6. The semiconductor device according to claim 5, wherein the doping concentration includes a doping concentration doped with boron impurity.
  7. 7. The semiconductor device according to claim 4, wherein, The N column comprises a first N column located in the first epitaxial layer and a second N column located in the second epitaxial layer, and the doping concentration of the second N column is smaller than that of the first N column.
  8. 8. The semiconductor device of claim 4, wherein a thickness in the second epitaxial layer is 10% -15% of a thickness of the epitaxial layer.
  9. 9. The semiconductor device of claim 4, wherein a doping concentration of the P-pillar is 100 times a doping concentration of the N-pillar within the second epitaxial layer.
  10. 10. A semiconductor device according to any of claims 4-9, characterized in that the semiconductor device is a superjunction VDMOS device.

Description

Semiconductor device and manufacturing method thereof Technical Field The present application relates to the field of semiconductors, and more particularly, to a semiconductor device and a method of manufacturing the same. Background The key design of the traditional super junction VDMOS device structure is that N (negative) pillars and P (positive) pillars are alternately arranged, and the N (negative) pillars and the P (positive) pillars have the same lateral width and doping concentration, so as to meet the charge balance condition (qn=qp). Under the off state of the super junction VDMOS device, positive carriers and load carriers of the P column and the N column are mutually depleted, so that the carrier concentration of a drain region in the super junction VDMOS device is reduced, the resistance is increased, and the voltage withstand capability of the device under the off state is increased. However, the super junction VDMOS device is subjected to heating processes such as annealing and oxidation, and impurities in the highly doped substrate region diffuse upward during heating, so that the impurity concentration of the N column is increased, and the drain cannot be completely consumed. Disclosure of Invention In view of the above technical problems, the present inventors creatively provide a semiconductor device and a method of manufacturing the same. According to a first aspect of an embodiment of the present application, there is provided a semiconductor device including a substrate, an epitaxial layer, and N pillars and P pillars alternately arranged within the epitaxial layer, wherein the epitaxial layer includes a first epitaxial layer and a second epitaxial layer, the second epitaxial layer is located below the first epitaxial layer and adjacent to the substrate, a doping concentration of the P pillars is equal to a doping concentration of the N pillars within the first epitaxial layer, and a doping concentration of the P pillars is greater than a doping concentration of the N pillars within the second epitaxial layer. According to one embodiment of the application, the P column comprises a first P column located in the first epitaxial layer and a second P column located in the second epitaxial layer, wherein the doping concentration of the second P column is larger than that of the first P column. According to an embodiment of the present application, the doping concentration includes a doping concentration doped with boron as an impurity. According to one embodiment of the application, the N-pillar comprises a first N-pillar located in the first epitaxial layer and a second N-pillar located in the second epitaxial layer, wherein the doping concentration of the second N-pillar is smaller than that of the first N-pillar. According to an embodiment of the present application, the thickness in the second epitaxial layer is 10% -15% of the thickness of the epitaxial layer. According to an embodiment of the present application, in the second epitaxial layer, the doping concentration of the P-pillar is 100 times that of the N-pillar. According to one embodiment of the application, the semiconductor device is a superjunction VDMOS device. According to a second aspect of the embodiment of the application, a manufacturing method of a semiconductor device is provided, and the manufacturing method comprises the steps of forming a second epitaxial layer on a substrate, wherein the doping concentration of the second epitaxial layer is a first doping concentration, grooving the second epitaxial layer to obtain a second P groove, injecting a P column material with the second doping concentration into the second P groove to obtain a second P column, forming a first epitaxial layer on the second epitaxial layer, the doping concentration of the first epitaxial layer is the same as that of the second epitaxial layer, grooving the first epitaxial layer to obtain a first P groove, injecting the P column material with the first doping concentration into the first P groove to obtain a first P column, and the first doping concentration is smaller than the second doping concentration. According to one embodiment of the application, the second P column is obtained by injecting the P column material with the second doping concentration into the second P groove, and the method comprises the steps of injecting the gaseous P column material into the second P groove by using a chemical vapor deposition process, and enabling the P column material to reach the second doping concentration by adjusting the airflow velocity of the P column material and/or adjusting the speed of the doping airflow. According to a third aspect of the embodiment of the application, a manufacturing method of a semiconductor device is provided, and the manufacturing method comprises the steps of forming a second epitaxial layer on a substrate, enabling the doping concentration of the second epitaxial layer to reach a fourth doping concentration, form