CN-116155288-B - High-speed pulse sampling circuit
Abstract
A high-speed pulse sampling circuit comprises a pulse level control circuit, a chip oscillator U1, an analog switch U3, a charging circuit, a first follower circuit and a switch on-time control circuit, wherein the pulse level control circuit is used for processing a high-speed pulse input by a pulse input end SG_IN and outputting a high-level pulse signal M, the chip oscillator U1 is electrically connected with the output end of the pulse level control circuit and processing the high-level pulse signal M and outputting a high-level pulse signal Q, the input end of the analog switch U3 is electrically connected with the output end of the chip oscillator U1 and is controlled to be conducted by the high-level pulse signal Q, a capacitor C5 connected with the output end of the analog switch U3 is arranged IN the charging circuit and is also electrically connected with an A/D converter through the first follower circuit, and the switch on-time control circuit is used for controlling the on-time of the analog switch U3. The invention solves the problem of difficult high-speed pulse sampling, and simultaneously, the hardware equipment related to the sampling circuit is relatively inexpensive.
Inventors
- CHEN CHUN
- XIANG YONG
Assignees
- 浙江威星智能仪表股份有限公司
Dates
- Publication Date
- 20260512
- Application Date
- 20230224
Claims (6)
- 1. The high-speed pulse sampling circuit is characterized by comprising a pulse level control circuit, a chip oscillator U1, an analog switch U3, a charging circuit, a follower circuit I and a switch on-time control circuit; the pulse level control circuit is connected with the pulse input end SG_IN, processes the high-speed pulse input by the pulse input end SG_IN and outputs a high-level pulse signal M, and comprises a second follower circuit and a comparison circuit, wherein the input end of the second follower circuit is connected with the pulse input end SG_IN, the input end of the comparison circuit is connected with the output end of the second follower circuit, and the output end of the comparison circuit is used for outputting the high-level pulse signal M; the chip oscillator U1 is electrically connected with the output end of the pulse level control circuit, processes the high-level pulse signal M and outputs a high-level pulse signal Q; The input end of the analog switch U3 is electrically connected with the output end of the chip oscillator U1, and is controlled to be conducted by the high-level pulse signal Q; a capacitor C5 connected with the output end of the analog switch U3 is arranged in the charging circuit, and the capacitor C5 is also electrically connected with the A/D converter through a first follower circuit; The switch on-time length control circuit is provided with a resistor R2 and a capacitor C2 which are connected in series, wherein the output end of the resistor R2 is connected with the capacitor C2, the output end of the resistor R2 is also connected with a 1Rext pin of the chip oscillator U1, the input end of the resistor R2 is connected with a Vcc pin of the chip oscillator U1, the time length of a high-level pulse signal Q is Tw, tw=KR2×C2, and K is 0.45.
- 2. The high-speed pulse sampling circuit according to claim 1, wherein the follower circuit comprises a chip operational amplifier U5 and a resistor R8; The input end IN+ of the chip operational amplifier U5 is connected with the pulse input end SG_IN, and the output end OUT of the chip operational amplifier U5 is connected with the input end of the comparison circuit through a capacitor C7; One end of the resistor R8 is connected with an OUT pin of the chip operational amplifier U5, and the other end of the resistor R8 is connected with an input end IN-of the chip operational amplifier U5.
- 3. The high-speed pulse sampling circuit according to claim 2, wherein the comparing circuit comprises a chip comparator U4, an input terminal +in of the chip comparator U4 is electrically connected to an output terminal OUT of the chip operational amplifier U5 through the capacitor C7, and an output terminal OUT of the chip comparator U4 is connected to an input terminal 1B of the chip oscillator U1.
- 4. A high-speed pulse sampling circuit according to claim 3, wherein a filter circuit is connected between the output terminal OUT of the chip comparator U4 and the input terminal 1B of the chip oscillator U1.
- 5. The high-speed pulse sampling circuit according to claim 1, wherein the first follower circuit comprises a chip operational amplifier U2 and a resistor R7; the input end IN+ of the chip operational amplifier U2 is connected with the capacitor C5, and the output end OUT of the chip operational amplifier U2 is connected with the A/D converter; one end of the resistor R7 is connected with the output end OUT of the chip operational amplifier U2, and the other end of the resistor R7 is connected with the input end IN-of the chip operational amplifier U2.
- 6. The high-speed pulse sampling circuit according to claim 1, wherein a resistor R6 connecting the output terminal of the analog switch U3 and the capacitor C5 is further provided in the charging circuit.
Description
High-speed pulse sampling circuit Technical Field The invention belongs to the field of electrical signals, and particularly relates to a high-speed pulse sampling circuit. Background In electronic circuits, the acquisition of pulse signals is usually involved, which is performed by a microprocessor in combination with an a/D converter. In reality, various high-speed pulse signals often appear in an electronic circuit, sometimes the signals are longer (ms), sometimes the signal duration is shorter (us) and even lower, and at the moment, a general microprocessor can lose the signals even if the reaction is interrupted, that is, the microprocessor can not realize pulse acquisition by combining with an A/D converter, even if the back end is provided with an A/D converter with better performance and more expensive price, the microprocessor can not necessarily deal with the signals. Disclosure of Invention Aiming at the defects of the prior art, the invention provides the high-speed pulse sampling circuit, which solves the problem of difficult high-speed pulse sampling, and meanwhile, hardware equipment related to the sampling circuit is relatively inexpensive. A high-speed pulse sampling circuit comprises a pulse level control circuit, a chip oscillator U1, an analog switch U3, a charging circuit, a follower circuit I and a switch on-time control circuit; a pulse level control circuit connected to the pulse input terminal sg_in for processing the high-speed pulse input from the pulse input terminal sg_in and outputting a high-level pulse signal M; the chip oscillator U1 is electrically connected with the output end of the pulse level control circuit, processes the high-level pulse signal M and outputs a high-level pulse signal Q; The input end of the analog switch U3 is electrically connected with the output end of the chip oscillator U1, and is controlled to be conducted by the high-level pulse signal Q; A resistor R6 and a capacitor C5 which are connected with the output end of the analog switch U3 are arranged in the charging circuit, and the capacitor C5 is also electrically connected with the A/D converter through a first follower circuit; The switch on-time length control circuit is provided with a resistor R2 and a capacitor C2 which are connected in series, wherein the output end of the resistor R2 is connected with the capacitor C2, the output end of the resistor R2 is also connected with a 1Rext pin of the chip oscillator U1, and the input end of the resistor R2 is connected with a Vcc pin of the chip oscillator U1. Preferably, the pulse level control circuit comprises a second follower circuit and a comparison circuit, wherein the input end of the second follower circuit is connected with the pulse input end SG_IN, the input end of the comparison circuit is connected with the output end of the second follower circuit, and the output end of the comparison circuit is used for outputting the high-level pulse signal M. Preferably, the follower circuit comprises a chip operational amplifier U5 and a resistor R8, wherein an input end IN+ of the chip operational amplifier U5 is connected with the pulse input end SG_IN, an output end OUT of the chip operational amplifier U5 is connected with an input end IN+ of the comparison circuit through a capacitor C7, one end of the resistor R8 is connected with an OUT pin of the chip operational amplifier U5, and the other end of the resistor R8 is connected with an input end IN-of the chip operational amplifier U5. Preferably, the comparing circuit includes a chip comparator U4, an input terminal +in of the chip comparator U4 is electrically connected to an output terminal OUT of the chip operational amplifier U5 through a capacitor C7, and an output terminal OUT of the chip comparator U4 is connected to an input terminal 1B of the chip oscillator U1. Preferably, a filter circuit is connected between the output terminal OUT of the chip comparator U4 and the input terminal 1B of the chip oscillator U1. Preferably, the first follower circuit comprises a chip operational amplifier U2 and a resistor R7; The input end of the chip operational amplifier U2 is connected with the capacitor C5, and the output end of the chip operational amplifier U2 is connected with the A/D converter; One end of the resistor R7 is connected with an OUT pin of the chip operational amplifier U2, and the other end of the resistor R7 is connected with an input end IN-of the chip operational amplifier U2. Preferably, a resistor R6 for connecting the output end of the analog switch U3 and the capacitor C5 is also arranged in the charging circuit. In summary, the invention has the following beneficial effects: the invention solves the problem of difficult high-speed pulse sampling, and simultaneously, the hardware equipment related to the sampling circuit is relatively inexpensive. Drawings Fig. 1 is a schematic diagram of a high-speed pulse sampling circuit. Detailed Description The invention will