CN-116190395-B - Image sensor integrated chip and forming method thereof

Abstract

The present application relates to an image sensor integrated chip. The image sensor integrated chip includes a photodiode region disposed within a substrate having a first semiconductor material region. A second region of semiconductor material is disposed on the substrate. A patterned doped layer is disposed between the substrate and the second region of semiconductor material. The second semiconductor material region includes a sidewall connected to a bottom surface of the second semiconductor material region. The sidewalls extend through the patterned doped layer. The bottom surface of the second semiconductor material region is located directly above the photodiode region. Embodiments of the application also relate to methods of forming an image sensor integrated chip.

Inventors

• ZHANG YONGCHANG
• LIN SHIWEI
• XIE DEXIAN
• LIN RONGYI

Assignees

• 台湾积体电路制造股份有限公司

Dates

Publication Date

20260512

Application Date

20220714

Priority Date

20220503

Claims (20)

1. 1. An image sensor integrated chip, comprising: a photodiode region disposed within a substrate including a first semiconductor material region; a second semiconductor material region disposed on the substrate; a patterned doped layer disposed between the substrate and the second semiconductor material region, and Wherein the second semiconductor material region includes a sidewall connected to a bottom surface of the second semiconductor material region, the sidewall extending through the patterned doped layer and the bottom surface being directly over the photodiode region.
2. 2. The image sensor integrated chip of claim 1, wherein sidewalls of the patterned doped layer laterally contact sidewalls of the second semiconductor material region along an interface located directly above the photodiode region.
3. 3. The image sensor integrated chip of claim 1, wherein the substrate includes sidewalls and a horizontally extending surface defining a recess in an upper surface of the substrate, the second region of semiconductor material being disposed in the recess.
4. 4. The image sensor integrated chip of claim 3, further comprising: A capping layer disposed on the second semiconductor material region and directly between the sidewalls of the substrate.
5. 5. The image sensor integrated chip of claim 1, wherein the patterned doped layer comprises boron.
6. 6. The image sensor integrated chip of claim 1, wherein the second semiconductor material region extends vertically below a bottom of the patterned doped layer.
7. 7. The image sensor integrated chip of claim 1, wherein the patterned doped layer is laterally and vertically located between the first and second regions of semiconductor material.
8. 8. The image sensor integrated chip of claim 1, wherein the patterned doped layer is a region of semiconductor material that is the same as the first region of semiconductor material.
9. 9. The image sensor integrated chip of claim 1, wherein the photodiode region comprises: a first doped region of a first doping type, wherein the first doped region is located directly below the bottom surface of the second semiconductor material region, and And a second doped region having a second doping type, wherein the second doped region includes a vertically extending second doped region coupled to a horizontally extending second doped region contacting a bottom of the first doped region.
10. 10. An image sensor integrated chip, comprising: a photodiode region disposed within the silicon substrate; A patterned doped silicon layer disposed on the silicon substrate, the patterned doped silicon layer having sidewalls directly over the photodiode region; a germanium region disposed on the patterned doped silicon layer, wherein the germanium region includes protrusions extending directly outward from a lower surface of the germanium region to between the sidewalls of the patterned doped silicon layer; a first interconnect coupled to a doped region extending from the first interconnect to the photodiode region, and A second interconnect is coupled to a first doped contact region disposed within the germanium region directly above the photodiode region and the protrusion of the germanium region.
11. 11. The image sensor integrated chip of claim 10, further comprising: A dielectric structure disposed over the germanium region and the silicon substrate, wherein the dielectric structure laterally surrounds the first interconnect and the second interconnect.
12. 12. The image sensor integrated chip of claim 10, further comprising: A first dielectric structure disposed under the silicon substrate and surrounding the first interconnect, and A second dielectric structure is disposed over the germanium region and surrounding the second interconnect.
13. 13. The image sensor integrated chip of claim 10, Wherein the patterned doped silicon layer includes a plurality of sidewalls laterally separated from one another by the patterned doped silicon layer, the plurality of sidewalls defining a plurality of individual channel openings extending through the patterned doped silicon layer, and Wherein the germanium regions extend through the plurality of individual channel openings to contact the silicon substrate.
14. 14. The image sensor integrated chip of claim 13, wherein the plurality of individual channel openings are arranged in an array and are spaced apart from each other along a first direction and a second direction perpendicular to the first direction, the first direction and the second direction being parallel to the lower surface of the germanium region.
15. 15. The image sensor integrated chip of claim 10, wherein the protrusions extend laterally beyond opposite sides of the photodiode region.
16. 16. A method of forming an image sensor integrated chip, comprising: Forming a photodiode region within a substrate comprising a first semiconductor material region; Forming a doped layer along an outer surface of the substrate and over the photodiode region; Patterning the doped layer to form a patterned doped layer having one or more sidewalls defining one or more channel openings extending through the patterned doped layer directly over the photodiode region, and A second region of semiconductor material is formed on the patterned doped layer and within the one or more channel openings.
17. 17. The method of claim 16, wherein forming the photodiode region comprises: Performing a first implantation process to form a first doped region having a first doping type, and A second implantation process is performed to form a second doped region having a second doping type, the second doped region being located below the first doped region.
18. 18. The method of claim 17, wherein the second doped region comprises a horizontally extending second doped region extending below a bottom of the second semiconductor material region and a vertically extending second doped region extending along a sidewall of the second semiconductor material region.
19. 19. The method of claim 16, further comprising: patterning the substrate to form a recess in an upper surface of the substrate; forming a second semiconductor material region in the recess, and A planarization process is performed to remove excess portions of the second semiconductor material region from over the substrate.
20. 20. The method of claim 16, further comprising: Performing an etching process to recess the second semiconductor material region below the upper surface of the substrate; Forming a cap layer over the second semiconductor material region, and A doped contact region is formed within the capping layer.

Description

Image sensor integrated chip and forming method thereof Technical Field Embodiments of the application relate to an image sensor integrated chip and a method of forming the same. Background An image sensor is a solid state device configured to convert incident light into an electrical signal. The image sensor operates according to a photoelectric effect, and when incident light strikes atoms within a semiconductor body, a phenomenon of electron-hole pairs is generated. The electrons and holes move in different directions to generate an electrical signal that can be provided to a processor that can convert the electrical signal into data. Integrated Chips (ICs) with image sensors are widely used in modern electronics such as cell phones, security cameras, medical devices, advanced driving assistance systems (e.g., forward Collision Warning (FCW), automatic Emergency Braking (AEB), pedestrian detection, etc.), etc. Disclosure of Invention Some embodiments of the present application provide an image sensor integrated chip including a photodiode region disposed within a substrate including a first semiconductor material region, a second semiconductor material region disposed on the substrate, a patterned doped layer disposed between the substrate and the second semiconductor material region, and wherein the second semiconductor material region includes a sidewall connected to a bottom surface of the second semiconductor material region, the sidewall extending through the patterned doped layer, and the bottom surface being located directly above the photodiode region. Further embodiments of the present application provide an image sensor integrated chip comprising a photodiode region disposed within a silicon substrate, a patterned doped silicon layer disposed on the silicon substrate, the patterned doped silicon layer having sidewalls directly over the photodiode region, a germanium region disposed on the patterned doped silicon layer, wherein the germanium region comprises protrusions extending from a lower surface of the germanium region directly outward to between the sidewalls of the patterned doped silicon layer, a first interconnect coupled to a doped region extending from the first interconnect to the photodiode region, and a second interconnect coupled to a first doped contact region disposed within the germanium region directly over the photodiode region and the protrusions of the germanium region. Still further embodiments of the present application provide a method of forming an image sensor integrated chip including forming a photodiode region within a substrate including a first semiconductor material region, forming a doped layer along an outer surface of the substrate and over the photodiode region, patterning the doped layer to form a patterned doped layer having one or more sidewalls defining one or more channel openings extending through the patterned doped layer directly over the photodiode region, and forming a second semiconductor material region on the patterned doped layer and within the one or more channel openings. Drawings The various aspects of the invention are best understood from the following detailed description when read in connection with the accompanying drawings. It should be noted that the various components are not drawn to scale according to standard practice in the industry. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion. Fig. 1A-1C illustrate some embodiments of an image sensor integrated chip including patterned doped layers disposed between different semiconductor materials. Fig. 2A-2C illustrate some embodiments of energy barriers associated with different image sensor integrated chips having different doped layers. Fig. 3A-3C illustrate top views of some embodiments of an image sensor integrated chip including a patterned doped layer. Fig. 4A-4B illustrate some additional embodiments of an image sensor integrated chip including a patterned doped layer. FIG. 5 illustrates a cross-sectional view of some alternative embodiments of an image sensor integrated chip including a patterned doped layer. Fig. 6A-6B illustrate cross-sectional views of some embodiments of a multi-dimensional integrated chip structure including a patterned doped layer. Fig. 7 shows a cross-sectional view of an integrated chip structure including a short wave infrared sensor direct time-of-flight (SWIR dToF) sensor (including a patterned doped layer). Fig. 8-20 illustrate some embodiments of a method of forming an image sensor integrated chip including a patterned doped layer. Fig. 21-31 illustrate some alternative embodiments of methods of forming an image sensor integrated chip including a patterned doped layer. FIG. 32 illustrates a flow chart of some embodiments of a method of forming an image sensor integrated chip including a patterned doped layer. Detailed Description The following disclosure provides many different embodimen