CN-116235479-B - System and method for flow control using multiple flow control unit interfaces
Abstract
Embodiments of the present disclosure relate to systems and methods for flow control using a multi-flit interface. The credit return field is used in a credit-based flow control system to indicate that one or more credits are being returned from a receiving device to a transmitting device. Based on the number of available credits, the transmitting device determines whether to transmit or wait until more credits are returned. The amount of buffer space used by the receiver to store the packet is determined by the number of transmit cycles used to receive the packet rather than the number of flits comprising the packet. This is achieved by making the buffer as wide as the bus. The receiver returns credits to the sender based on the number of buffer rows used to store the received packets, rather than the number of flits comprising the packets.
Inventors
- T. M. Brewer
Assignees
- 美光科技公司
Dates
- Publication Date
- 20260512
- Application Date
- 20210622
- Priority Date
- 20200831
Claims (15)
- 1. A system for flow control, comprising: logic configured to perform operations comprising: transmitting a plurality of flow control unit flits to a destination over a transmission cycle, two or more of the plurality of flits being part of a packet directed to a first virtual channel of the destination, and Based on the two or more of the plurality of flits being sent on the transfer cycle and being part of the packet directed to the first virtual channel, the data representing the number of credits is modified by reducing the number of credits of the first virtual channel of the destination by 1.
- 2. The system of claim 1, wherein: A flit of the plurality of flits is directed to a second virtual channel of the destination, an The operations further comprise: A second number of credits of the second virtual channel of the destination is reduced by 1 based on the flit being directed to the second virtual channel.
- 3. The system of claim 1, wherein the operations further comprise: Before the transmitting the plurality of flits, determining to transmit the packet based on the number of credits of the first virtual channel of the destination, a count of the plurality of flits, and a count of flits in the packet.
- 4. A system according to claim 3, wherein: The plurality of flits including one or more flits directed to a second virtual channel, and The determining to send the packet is further based on a count of the one or more flits of the second virtual channel.
- 5. The system of claim 1, wherein: At least one of the flits of the first virtual channel directed to the destination includes an identifier of the first virtual channel.
- 6. A non-transitory machine-readable medium storing instructions that, when executed by a system, cause the system to perform operations comprising: transmitting a plurality of flow control unit flits to a destination over a transmission cycle, two or more of the plurality of flits being part of a packet directed to a first virtual channel of the destination, and Based on the two or more of the plurality of flits being sent on the transfer cycle and being part of the packet directed to the first virtual channel, the data representing the number of credits is modified by reducing the number of credits of the first virtual channel of the destination by 1.
- 7. The non-transitory machine-readable medium of claim 6, wherein: one flit of the plurality of flits is directed to a second virtual channel, and The operations further comprise: A second number of credits of the second virtual channel of the destination is reduced by 1 based on the flit being directed to the second virtual channel.
- 8. The non-transitory machine-readable medium of claim 6, wherein the operations further comprise: Before the transmitting the plurality of flits, determining to transmit the packet based on the number of credits of the first virtual channel of the destination, a count of the plurality of flits, and a count of flits in the packet.
- 9. The non-transitory machine-readable medium of claim 8, wherein: The plurality of flits including one or more flits directed to a second virtual channel, and The determining to send the packet is further based on a count of the one or more flits directed to the second virtual channel.
- 10. The non-transitory machine-readable medium of claim 6, wherein: At least one of the flits of the first virtual channel directed to the destination includes an identifier of the first virtual channel.
- 11. A method for flow control, comprising: transmitting a plurality of flow control unit flits to a destination over a transmission cycle, two or more of the plurality of flits being part of a packet directed to a first virtual channel of the destination, and Based on the two or more of the plurality of flits being sent on the transfer cycle and being part of the packet directed to the first virtual channel, the data representing the number of credits is modified by reducing the number of credits of the first virtual channel of the destination by 1.
- 12. The method according to claim 11, wherein: one flit of the plurality of flits is directed to a second virtual channel, and The method further comprises: A second number of credits of the second virtual channel of the destination is reduced by 1 based on the flit being directed to the second virtual channel.
- 13. The method of claim 11, wherein the method further comprises: Before the transmitting the plurality of flits, determining to transmit the packet based on the number of credits of the first virtual channel of the destination, a count of the plurality of flits, and a count of flits in the packet.
- 14. The method according to claim 13, wherein: The plurality of flits including one or more flits directed to a second virtual channel, and The determining to send the packet is further based on a count of the one or more flits of the second virtual channel.
- 15. The method according to claim 11, wherein: At least one of the flits of the first virtual channel directed to the destination includes an identifier of the first virtual channel.
Description
System and method for flow control using multiple flow control unit interfaces Priority application The present application claims priority to U.S. application Ser. No. 17/007,468, filed 8/31/2020, the entire contents of which are incorporated herein by reference. Statement regarding government support The present invention was carried out under DARPA awarded HR00111830003 under support of the united states government. The united states government has certain rights in this invention. Technical Field Embodiments of the present disclosure relate generally to network protocols and, more particularly, to networking virtual channels over multiple flow control unit ("flit") interfaces using a simplified flow control credit mechanism of packets. Background The packet is divided into flits for transmission by the transmitting device over the bus. The transmitting device verifies that enough credits are available to the receiving device for accepting all flits of the packet before transmitting the packet to the receiving device. In many conventional systems, one credit is used for each flit. The first flit of a packet is a header flit containing data for routing through the network. The header flit is followed by zero or more body flits. Chiplets are an emerging technology for integrating various processing functionalities. In general, chiplet systems consist of discrete chips, such as Integrated Circuits (ICs) on different substrates or dies, integrated on an interposer and packaged together. This arrangement is different from a single chip (e.g., an IC) that contains different device blocks (e.g., intellectual Property (IP) blocks) (e.g., system on chip (SoC)) on one substrate (e.g., a single die) or discreet packaged devices integrated on a board. Generally, chiplets provide better performance (e.g., lower power consumption, reduced latency, etc.) than discreet packaged devices, and chiplets provide greater production benefits than single-die chips. These production benefits may include higher yields or reduced development costs and time. Chiplet systems typically consist of one or more application chiplets and support chiplets. The distinction between application and support chiplets is here only a possible design of the reference chiplet system. Thus, for example, a composite visual chiplet system can include an application chiplet for producing a composite visual output as well as a support chiplet, such as a memory controller chiplet, a sensor interface chiplet, or a communication chiplet. In a typical use case, a composite vision designer may design an application chiplet and obtain a support chiplet from other parties. Thus, design expenditure (e.g., in terms of time or complexity) is reduced because by avoiding design and production of functionality embodied in the support chiplet. Chiplets also support tight integration of IP blocks that might otherwise be difficult, such as tight integration of IP blocks using different feature sizes. Thus, for example, devices designed with larger feature sizes during the production of the previous generation or those in which the feature sizes are optimized for power, speed, or heat generation (as may occur with sensors) may be integrated with devices having different feature sizes, which is easier than attempting to do so on a single die. In addition, by reducing the overall size of the die, the yield of the chiplet tends to be higher than that of more complex single-die devices. In a chiplet system, communication between chiplets can include packet-based communication or direct connection across a network. In conventional systems, the efficiency of transfer and storage of such packet-based communications can impact the performance of the overall chiplet system. Drawings The present disclosure will be understood more fully from the detailed description given below and from the accompanying drawings of various embodiments of the disclosure. The drawings, however, should not be taken to limit the disclosure to the specific embodiments, but are for explanation and understanding only. FIGS. 1A and 1B illustrate examples of chiplet systems according to embodiments. FIG. 2 illustrates components of an example of a memory controller chiplet according to an embodiment. Fig. 3 illustrates an example of routing between chiplets in a chiplet layout using a Chiplet Protocol Interface (CPI) network in accordance with an embodiment. Fig. 4 is a block diagram of a data packet including multiple flits according to some embodiments of the present disclosure. Fig. 5 is a block diagram showing a received flit stream and a virtual channel queue of received flits, according to some embodiments of the present disclosure. Fig. 6 is a flowchart showing the operations of a method performed by a circuit when sending multiple flits on a transmit cycle, according to some embodiments of the present disclosure. Fig. 7 is a flowchart showing the operations of a method performed by a circuit when r