CN-116247090-B - Gallium nitride IGBT device with body diode, preparation method thereof and chip
Abstract
The application belongs to the technical field of semiconductors, and provides a gallium nitride IGBT device with a body diode, a preparation method thereof and a chip thereof, wherein the gallium nitride IGBT device with the body diode comprises: the semiconductor device comprises a P-type gallium nitride collector region, an N-type gallium nitride layer, a P-type gallium nitride layer, a gate dielectric layer, a gate, a first N-type emitter region, a Schottky metal region, an isolation region, a first emitter, a second emitter and a collector. The Schottky metal region is arranged in the P-type gallium nitride layer and the N-type gallium nitride layer, when the gallium nitride IGBT device works, the Schottky metal region can form a body diode of the gallium nitride IGBT device, when the gallium nitride IGBT device is turned off, the body diode formed by the Schottky metal region can consume residual current of the gallium nitride IGBT device, namely, the wake flow of the gallium nitride IGBT device is cut off, so that the power consumption of the gallium nitride IGBT device when the gallium nitride IGBT device is turned off is reduced, and the performance of the gallium nitride IGBT device is improved.
Inventors
- HUANG HUIQIN
Assignees
- 天狼芯半导体(成都)有限公司
Dates
- Publication Date
- 20260505
- Application Date
- 20221221
Claims (10)
- 1. A gallium nitride IGBT device having a body diode, the gallium nitride IGBT device comprising: A P-type gallium nitride collector region; the N-type gallium nitride layer is arranged on the front surface of the P-type gallium nitride collector region; the P-type gallium nitride layer is arranged on the N-type gallium nitride layer; The grid dielectric layer is arranged in the P-type gallium nitride layer and extends into the N-type gallium nitride layer, wherein the grid dielectric layer is of a concave structure and divides the P-type gallium nitride layer into a first P-type gallium nitride doped region and a second P-type gallium nitride doped region; the grid electrode is arranged in the groove of the grid electrode dielectric layer; The first N-type emission region is arranged in the first P-type gallium nitride doping region and is in contact with the gate dielectric layer; the Schottky metal region is arranged in the P-type gallium nitride layer and the N-type gallium nitride layer and is respectively contacted with the P-type gallium nitride layer and the N-type gallium nitride layer; the isolation region is arranged in the P-type gallium nitride layer and the N-type gallium nitride layer and is used for isolating the Schottky metal region and the grid dielectric layer; the first emitter is arranged on the first P-type gallium nitride doped region and the first N-type emitter; the second emitter is arranged on the Schottky metal region; and the collector electrode is arranged on the back surface of the P-type gallium nitride collector region.
- 2. The gallium nitride IGBT device with body diode of claim 1 wherein the second P-type gallium nitride doped region is located between the isolation region and the gate dielectric layer, the second emitter being connected to the first emitter.
- 3. The gallium nitride IGBT device with body diode of claim 1, the gallium nitride IGBT device with the body diode is characterized by further comprising: The second N-type emission region is arranged in the second P-type gallium nitride doped region and is positioned between the gate dielectric layer and the isolation region; The second emitter is arranged on the second N-type emission region, the isolation region and the Schottky metal region.
- 4. The gallium nitride IGBT device with body diodes of claim 1 wherein the isolation region is in contact with the gate dielectric layer and the second emitter is connected to the first emitter.
- 5. The gallium nitride IGBT device with body diode of claim 1 wherein the thickness of the isolation region is the same as the thickness of the schottky metal region.
- 6. The gallium nitride IGBT device with body diodes according to any of claims 1 to 5, wherein the gate dielectric layer has a thickness greater than the thickness of the P type gallium nitride layer and less than the sum of the thicknesses of the P type gallium nitride layer and the N type gallium nitride layer.
- 7. A gallium nitride IGBT device with a body diode according to any one of claims 1 to 5, wherein the gallium nitride IGBT device with a body diode further comprises: The first buffer doping region and the second buffer doping region are respectively arranged at two sides of the collector electrode and are not contacted with the collector electrode; The first substrate doping region and the second substrate doping region are respectively arranged on the back surfaces of the first buffer doping region and the second buffer doping region.
- 8. A method for fabricating a gallium nitride IGBT device having a body diode, comprising: Forming a buffer layer on the front surface of the semiconductor substrate, and forming an N-type gallium nitride layer on the buffer layer; forming a P-type gallium nitride layer on the N-type gallium nitride layer; Forming a grid dielectric layer and an isolation region, wherein the grid dielectric layer is arranged in the P-type gallium nitride layer and extends into the N-type gallium nitride layer, the grid dielectric layer is of a concave structure, the grid dielectric layer divides the P-type gallium nitride layer into a first P-type gallium nitride doping region and a second P-type gallium nitride doping region, and the isolation region is arranged in the P-type gallium nitride layer and extends into the N-type gallium nitride layer; forming a first N-type emission region in the first P-type gallium nitride doped region, wherein the first N-type emission region is in contact with the gate dielectric layer; Forming a grid electrode in the groove of the grid electrode dielectric layer and forming a Schottky metal region, wherein the Schottky metal region is arranged in the P-type gallium nitride layer and extends into the N-type gallium nitride layer to be contacted with the isolation region, and the Schottky metal region is respectively contacted with the P-type gallium nitride layer and the N-type gallium nitride layer; Forming a first emitter on the first P-type gallium nitride doped region and the first N-type emitter region; etching the back surface of the semiconductor substrate, and implanting P-type doping ions into the N-type gallium nitride layer under a first preset condition to form a P-type gallium nitride collector region on the back surface of the N-type gallium nitride layer; and forming a collector electrode on the back surface of the P-type gallium nitride collector region.
- 9. The method of claim 8, wherein implanting P-type dopant ions into the N-type gallium nitride layer under the first preset condition comprises: and performing a P-type doped ion implantation process under the conditions that the pressure is 300-500 MPa and the temperature is 1200-1300 ℃ to form a P-type gallium nitride collector region on the back surface of the N-type gallium nitride layer, wherein the time of the P-type doped ion implantation process is 10-20 minutes.
- 10. A chip comprising the gallium nitride IGBT device with body diode as set forth in any one of claims 1-7.
Description
Gallium nitride IGBT device with body diode, preparation method thereof and chip Technical Field The application belongs to the technical field of semiconductors, and particularly relates to a gallium nitride IGBT device with a body diode, a preparation method thereof and a chip. Background The insulated gate bipolar transistor (Insulated Gate Bipolar Transistor, IGBT) is a compound fully-controlled voltage-driven power semiconductor device composed of a BJT (bipolar transistor) and a MOSFET (metal oxide semiconductor field effect transistor), combines the low on-resistance and high withstand voltage characteristics of the BJT and the MOSFET, has the excellent characteristics of voltage control, large input impedance, small driving power, small on-resistance, low switching loss and the like, and is widely applied to medium and high power electronic systems. IGBTs are commonly referred to as "CPUs" of power electronics devices. As one of important high-power mainstream devices of power electronics, IGBTs have been widely used in fields of home appliances, transportation, power engineering, renewable energy sources, smart grids, and the like. In industrial applications such as traffic control, power conversion, industrial motors, uninterruptible power supplies, wind power and solar devices, and frequency converters for automatic control, current consumption of existing IGBT power devices when turned off takes a long time, resulting in excessive dynamic power consumption. Disclosure of Invention In order to solve the technical problems, the embodiment of the application provides a gallium nitride IGBT device with a body diode, a preparation method thereof and a chip, and aims to solve the problems that the current vanishes in turn-off of the traditional IGBT power device and long time is needed, so that the dynamic power consumption is overlarge. A first aspect of an embodiment of the present application provides a gallium nitride IGBT device with a body diode, the gallium nitride IGBT device comprising: A P-type gallium nitride collector region; the N-type gallium nitride layer is arranged on the front surface of the P-type gallium nitride collector region; the P-type gallium nitride layer is arranged on the N-type gallium nitride layer; The grid dielectric layer is arranged in the P-type gallium nitride layer and extends into the N-type gallium nitride layer, wherein the grid dielectric layer is of a concave structure and divides the P-type gallium nitride layer into a first P-type gallium nitride doped region and a second P-type gallium nitride doped region; the grid electrode is arranged in the groove of the grid electrode dielectric layer; The first N-type emission region is arranged in the first P-type gallium nitride doping region and is in contact with the gate dielectric layer; The Schottky metal region is arranged in the P-type gallium nitride layer and the N-type gallium nitride layer; the isolation region is arranged in the P-type gallium nitride layer and the N-type gallium nitride layer and is used for isolating the Schottky metal region and the grid dielectric layer; the first emitter is arranged on the first P-type gallium nitride doped region and the first N-type emitter; the second emitter is arranged on the Schottky metal region; and the collector electrode is arranged on the back surface of the P-type gallium nitride collector region. In one embodiment, the second P-type gallium nitride doped region is disposed between the isolation region and the gate dielectric layer, and the second emitter is connected to the first emitter. In one embodiment, the gallium nitride IGBT device with a body diode further includes: The second N-type emission region is arranged in the second P-type gallium nitride doped region and is positioned between the gate dielectric layer and the isolation region; The second emitter is arranged on the second N-type emission region, the isolation region and the Schottky metal region. In one embodiment, the isolation region is in contact with the gate dielectric layer, and the second emitter is connected to the first emitter. In one embodiment, the thickness of the isolation region is the same as the thickness of the schottky metal region. In one embodiment, the thickness of the gate dielectric layer is greater than the thickness of the P-type gallium nitride layer and less than the sum of the thicknesses of the P-type gallium nitride layer and the N-type gallium nitride layer. In one embodiment, the gallium nitride IGBT device with a body diode further includes: The first buffer doping region and the second buffer doping region are respectively arranged at two sides of the collector electrode and are not contacted with the collector electrode; The first substrate doping region and the second substrate doping region are respectively arranged on the back surfaces of the first buffer doping region and the second buffer doping region. A second aspect of an embodiment of the pr