CN-116339794-B - System, method, device, equipment and medium for managing unified firmware of server
Abstract
The invention provides a unified firmware management system, a method, a device, equipment and a medium of a server, belonging to the technical field of server firmware management, wherein the system comprises a BMC, a CPLD, a main and standby BIOS flash memory, a main and standby SCP flash memory and a host CPU; the BMC is connected with the main BIOS flash memory, the standby BIOS flash memory and the main SCP flash memory, the CPLD is connected with the main BIOS flash memory, the standby BIOS flash memory, the main SCP flash memory and the standby SCP flash memory, the CPLD is also connected with the BMC and the host CPU, the main BIOS flash memory stores the main BIOS firmware mirror image, the standby BIOS flash memory stores the standby BIOS firmware mirror image, and the main SCP flash memory stores the main SCP firmware mirror image and the standby SCP flash memory stores the SCP firmware mirror image. The invention unifies the matched starting and upgrading of the BIOS firmware and the SCP firmware, has high upgrading efficiency, ensures that both the firmware can be smoothly started, and ensures the stable operation of the server.
Inventors
- YE XIAOXI
Assignees
- 苏州浪潮智能科技有限公司
Dates
- Publication Date
- 20260512
- Application Date
- 20230329
Claims (8)
- 1. The unified firmware management system of the server is characterized by comprising a baseboard management controller, a complex programmable logic device, a main basic input output system flash memory, a standby basic input output system flash memory, a main system control processor flash memory, a standby system control processor flash memory and a host central processing unit; The substrate management controller is connected with the main basic input/output system flash memory, the standby basic input/output system flash memory, the main system control processor flash memory and the standby system control processor flash memory; The complex programmable logic device is connected with the main basic input/output system flash memory, the standby basic input/output system flash memory, the main system control processor flash memory and the standby system control processor flash memory; the complex programmable logic device is also connected with the baseboard management controller and the host central processing unit; The main basic input output system flash memory stores a main basic input output system firmware mirror image, and the standby basic input output system flash memory stores a standby basic input output system firmware mirror image; the main system control processor flash memory stores a main system control processor firmware image, and the standby system control processor flash memory stores a reserve system control processor firmware image; The complex programmable logic device selects a matched basic input/output system firmware image and a system control processor firmware image to start according to the power-on condition of the host central processing unit, and records the currently started main and standby firmware images; the baseboard management controller controls the updating of the basic input and output system firmware image and the firmware image of the system control processor, records the firmware image version in the flash memory, and updates the corresponding firmware image according to the main and standby firmware images started at present after the host central processing unit completes the starting; The complex programmable logic device selects a matched basic input/output system firmware image and a system control processor firmware image to start according to the power-on condition of a host central processing unit, records a currently started main firmware image and a currently started standby firmware image, and comprises the following steps: s11, configuring a main basic input output system flash memory and a standby basic input output system flash memory for the basic input output system firmware in advance, and storing basic input output system firmware images in the two basic input output system flash memories; S12, configuring a main system control processor flash memory and a standby system control processor flash memory for the system control processor firmware in advance, and storing a firmware mirror image of the system control processor in the two system control processor flash memories; S13, the complex programmable logic device selects a main basic input and output system flash memory or a firmware mirror image in a main system control processor flash memory to start according to the power-on and power-on conditions of the host central processing unit or selects a standby basic input and output system flash memory and a firmware mirror image in a standby system control processor flash memory to start; s14, the complex programmable logic device records a basic input/output system used for starting up a host central processing unit and a main firmware image and a standby firmware image of a system control processor; The specific steps of step S13 are as follows: S131, the complex programmable logic device judges whether a host central processing unit is powered on or not and then starts for the first time; If yes, go to step S133; If not, go to step S132; s132, starting a host central processing unit by using a basic input/output system firmware mirror image in a basic input/output system flash memory used in the last normal starting and a system control processor firmware mirror image in a system control processor flash memory through the complex programmable logic device, and entering a step S2; s133, selecting a basic input/output system firmware image in a main basic input/output system flash memory by the complex programmable logic device, and selecting a system control processor firmware image in a main system control processor flash memory to match for starting up a host central processor; S134, the complex programmable logic device judges whether the host central processing unit is started successfully or not; if yes, go to step S14; if not, go to step S135; S135, selecting a basic input/output system firmware image in a basic input/output system flash memory for the host CPU, and selecting a system control processor firmware image in a system control processor flash memory for matching to start.
- 2. The server unified firmware management system as claimed in claim 1 wherein the baseboard management controller is further connected with a storage unit and a remote server; the storage unit is used for recording the active states of the firmware mirror version and each firmware mirror in the main basic input and output system flash memory, the standby basic input and output system flash memory, the main system control processor flash memory and the standby system control processor flash memory by the baseboard management controller; the baseboard management controller is connected with the remote server through an external interface and provides firmware mirror version information in the main basic input and output system flash memory, the standby basic input and output system flash memory, the main system control processor flash memory and the standby system control processor flash memory for the remote server.
- 3. The unified firmware management method for the server is characterized by comprising the following steps of: s1, selecting a matched basic input/output system firmware image and a system control processor firmware image to start according to the power-on condition of a host central processing unit, and recording a currently started main firmware image and a currently started standby firmware image; S2, controlling the basic input and output system and the system control processor to correspond to the firmware image upgrade, recording the firmware image version after the upgrade, and updating the corresponding firmware image according to the main and standby firmware images started currently after the host central processing unit completes the startup; the specific steps of step S1 are as follows: s11, configuring a main basic input output system flash memory and a standby basic input output system flash memory for the basic input output system firmware in advance, and storing basic input output system firmware images in the two basic input output system flash memories; S12, configuring a main system control processor flash memory and a standby system control processor flash memory for the system control processor firmware in advance, and storing a firmware mirror image of the system control processor in the two system control processor flash memories; S13, the complex programmable logic device selects a main basic input and output system flash memory or a firmware mirror image in a main system control processor flash memory to start according to the power-on and power-on conditions of the host central processing unit or selects a standby basic input and output system flash memory and a firmware mirror image in a standby system control processor flash memory to start; s14, the complex programmable logic device records a basic input/output system used for starting up a host central processing unit and a main firmware image and a standby firmware image of a system control processor; The specific steps of step S13 are as follows: S131, the complex programmable logic device judges whether a host central processing unit is powered on or not and then starts for the first time; If yes, go to step S133; If not, go to step S132; s132, starting a host central processing unit by using a basic input/output system firmware mirror image in a basic input/output system flash memory used in the last normal starting and a system control processor firmware mirror image in a system control processor flash memory through the complex programmable logic device, and entering a step S2; s133, selecting a basic input/output system firmware image in a main basic input/output system flash memory by the complex programmable logic device, and selecting a system control processor firmware image in a main system control processor flash memory to match for starting up a host central processor; S134, the complex programmable logic device judges whether the host central processing unit is started successfully or not; if yes, go to step S14; if not, go to step S135; S135, selecting a basic input/output system firmware image in a basic input/output system flash memory for the host CPU, and selecting a system control processor firmware image in a system control processor flash memory for matching to start.
- 4. The method for managing unified firmware of server according to claim 3 wherein step S2 comprises the specific steps of: S21, the baseboard management controller controls the main basic input and output system flash memory, the basic input and output system firmware image in the spare basic input and output system flash memory, the main system control processor flash memory and the independent upgrade of the system control processor firmware image in the spare system control processor flash memory, and records the firmware image version and the active state of each firmware image in each flash memory after upgrade; s22, after the host central processing unit is started successfully, the baseboard management controller inquires the main firmware mirror image and the power-on starting information used for starting the host central processing unit from the complex programmable logic device; s23, the baseboard management controller judges whether the host CPU is started last time and whether the host BIOS flash memory or the firmware mirror image in the host CPU flash memory is used for failure starting; if yes, go to step S24; if not, go to step S25; s24, prompting the firmware mirror image with failed starting by the baseboard management controller through recording logs, prompting updating of the firmware mirror image, and returning to the step S13; S25, the baseboard management controller judges whether the main basic input output system flash memory is higher than a firmware mirror version of the basic input output system in the standby basic input output system flash memory, and whether the main system control processor flash memory is higher than a firmware mirror version of the system control processor in the standby system control processor flash memory, and updates the firmware mirror versions in the standby basic input output system flash memory and the standby system control processor flash memory when the firmware mirror versions in the main basic input output system flash memory and the main system control processor flash memory are higher.
- 5. The method for managing unified firmware of server according to claim 4 wherein step S25 comprises the specific steps of: s251, the baseboard management controller judges whether the main basic input output system flash memory is higher than a firmware mirror version of the basic input output system in the standby basic input output system flash memory; If yes, go to step S252; If not, go to step S254; s252, the baseboard management controller judges that the firmware image of the basic input/output system in the flash memory of the main basic input/output system is updated before the host central processing unit is started; S253, updating the firmware mirror image of the basic input/output system in the flash memory of the standby basic input/output system to the same version as that in the flash memory of the main basic input/output system by the baseboard management controller; S254, the baseboard management controller judges whether the flash memory of the main system control processor is higher than the firmware mirror version of the system control processor in the flash memory of the standby system control processor; if yes, go to step S255; If not, returning to the step S13; S255, the baseboard management controller judges that the firmware image of the system control processor in the flash memory of the main system control processor is updated before the host central processor is started; S256, updating the firmware image of the system control processor in the flash memory of the standby system control processor to the same version as that in the flash memory of the main system control processor by the baseboard management controller, and returning to the step S13.
- 6. A server unified firmware management apparatus, comprising: the system comprises a main machine central processing unit starting control module, a main machine central processing unit starting control module and a main machine standby firmware image, wherein the main machine central processing unit starting control module is used for selecting a matched basic input and output system firmware image and a system control processor firmware image to start according to the power-on condition of the main machine central processing unit, and recording the main and standby firmware images which are started currently; the firmware image upgrading module is used for controlling the basic input and output system and the system control processor to correspond to the firmware image upgrading, recording the firmware image version after the upgrading, and after the host central processing unit finishes starting, updating the corresponding firmware image according to the currently started main and standby firmware images; The method for starting the system control processor firmware image comprises the steps of selecting the matched basic input/output system firmware image and the system control processor firmware image according to the power-on condition of a host central processing unit, starting the basic input/output system firmware image and the system control processor firmware image, recording the currently started main/standby firmware image, and comprising the following steps: s11, configuring a main basic input output system flash memory and a standby basic input output system flash memory for the basic input output system firmware in advance, and storing basic input output system firmware images in the two basic input output system flash memories; S12, configuring a main system control processor flash memory and a standby system control processor flash memory for the system control processor firmware in advance, and storing a firmware mirror image of the system control processor in the two system control processor flash memories; S13, the starting control module of the host central processing unit selects the main basic input and output system flash memory or the firmware mirror image in the main system control processor flash memory to start according to the power-on and power-on conditions of the host central processing unit or selects the spare basic input and output system flash memory or the firmware mirror image in the spare system control processor flash memory to start; s14, the starting control module of the host central processing unit records the primary input/output system used by the starting of the host central processing unit and the primary and standby firmware mirror images of the system control processor; The specific steps of step S13 are as follows: s131, the starting control module of the host central processor judges whether the host central processor is started for the first time after being electrified; If yes, go to step S133; If not, go to step S132; S132, a starting control module of the central processing unit of the host starts the central processing unit of the host by using a basic input/output system firmware image in a basic input/output system flash memory which is normally started and used last time and a system control processor firmware image in a system control processor flash memory, and then the step S2 is carried out; S133, a starting control module of the host CPU selects a basic input/output system firmware image in the main basic input/output system flash memory, and selects a system control processor firmware image in the main system control processor flash memory to match for starting up the host CPU; S134, the starting control module of the host central processing unit judges whether the host central processing unit is started successfully or not; if yes, go to step S14; if not, go to step S135; s135, the starting control module of the host CPU selects the firmware mirror image of the basic input/output system in the flash memory of the standby basic input/output system for the host CPU, and selects the firmware mirror image matching of the system control processor in the flash memory of the standby system control processor for starting.
- 7. An apparatus, characterized in that, Including a processor and a memory; wherein the memory is adapted to store a computer program, the processor being adapted to call and run the computer program from the memory to cause the device to perform the method of any of the preceding claims 3-5.
- 8. A storage medium having stored therein instructions which, when executed on a computer, cause the computer to perform the method of any of the preceding claims 3-5.
Description
System, method, device, equipment and medium for managing unified firmware of server Technical Field The invention belongs to the technical field of server firmware management, and particularly relates to a system, a method, a device, equipment and a medium for unified firmware management of a server. Background BIOS, which is the abbreviation of Basic Input Output System, basic input output system. SCP, which is the abbreviation of System Control Processor, system control processor. BMC, short for Baseboard Management Controller, baseboard management controller. CPLD, which is a simple name for Complex Programmable Logic Device, is a complex programmable logic device. In order to meet the requirements of higher and higher performance and functional requirements of the server system, the improvement of starting speed and starting stability becomes a target for continuous pursuit of server development. In order to increase the updating speed of BIOS firmware, the BIOS firmware needed by the system startup and guide is split, the original BIOS firmware is split into a BIOS part and an SCP part, the content which is not updated frequently is put into the SCP part, and the BIOS part stores the content which is changed frequently. The method ensures that the content of the SCP part is not changed frequently, and the updating speed of the less changed content is greatly improved when the BIOS firmware is updated, and the SCP part can also be used as a bridge for the BMC to access the central processor and can provide a corresponding password for the BMC to acquire part of information of the central processor, so that the original BIOS firmware is greatly popularized in a mode of splitting the BIOS firmware into the BIOS part and the SCP part. However, when the server is started, the split mode of the BIOS firmware needs to be matched with the BIOS part to enable the server to be started normally, but in actual situations, the two parts serving as the dual firmware are often not matched, and the two parts need to be upgraded. In the related art, there are main and standby BIOS upgrading, switching and starting, and a dual firmware matching stage upgrading mode is not involved. Therefore, in order to address the above-mentioned drawbacks, it is necessary to provide a system, a method, an apparatus, a device, and a medium for managing unified firmware of a server. Disclosure of Invention Aiming at the defect that the BIOS firmware is split into two parts for improving the firmware updating speed but the double firmware matching and upgrading modes are not generated, the invention provides a unified firmware management system, method, device, equipment and medium for a server, so as to solve the technical problems. In a first aspect, the present invention provides a unified firmware management system for a server, including a baseboard management controller, a complex programmable logic device, a main bios flash memory, a standby bios flash memory, a main cpu flash memory, a standby cpu flash memory, and a host cpu; The substrate management controller is connected with the main basic input/output system flash memory, the standby basic input/output system flash memory, the main system control processor flash memory and the standby system control processor flash memory; The complex programmable logic device is connected with the main basic input/output system flash memory, the standby basic input/output system flash memory, the main system control processor flash memory and the standby system control processor flash memory; the complex programmable logic device is also connected with the baseboard management controller and the host central processing unit; The main basic input output system flash memory stores a main basic input output system firmware mirror image, and the standby basic input output system flash memory stores a standby basic input output system firmware mirror image; the main system control processor flash memory stores a main system control processor firmware image, and the standby system control processor flash memory stores a reserve system control processor firmware image; The complex programmable logic device selects a matched basic input/output system firmware image and a system control processor firmware image to start according to the power-on condition of the host central processing unit, and records the currently started main and standby firmware images; The baseboard management controller controls the updating of the basic input and output system firmware image and the firmware image of the system control processor, records the firmware image version in the flash memory, and updates the corresponding firmware image according to the main and standby firmware images started at present after the host central processing unit completes the starting. Further, the baseboard management controller is also connected with a storage unit and a remote server; the storage unit is used for recording the ac