CN-116343635-B - Display panel and display device

CN116343635BCN 116343635 BCN116343635 BCN 116343635BCN-116343635-B

Abstract

The invention discloses a display panel and a display device. The display panel comprises a display area, a non-display area surrounding the display area, N data lines which extend along a first direction and are arranged along a second direction are arranged in the display area, the display panel further comprises a plurality of multiplexers and a grid driving circuit, the grid driving circuit and the multiplexers are arranged in the non-display area adjacent to the display area along the second direction, the display panel further comprises N source signal lines which extend along the second direction, the source signal lines are electrically connected with the data lines in a one-to-one correspondence manner, and the source signal lines are used for transmitting data signals input by the multiplexers to the corresponding data lines, and N is more than or equal to 3. The invention can reduce the size of the lower frame of the display panel.

Inventors

QIN XU
HU SIMING
XU CHUANZHI
ZHANG SHAOHU

Assignees

昆山国显光电有限公司

Dates

Publication Date: 20260512
Application Date: 20230207

Claims (7)

1. A display panel, wherein the display panel comprises a display area and a non-display area surrounding the display area; n data lines extending along the first direction and arranged along the second direction are arranged in the display area; the display panel also comprises a plurality of multiplexers and a grid driving circuit; the grid driving circuit and the multiple multiplexers are arranged in a non-display area adjacent to the display area along the second direction, and the non-display area comprises a first non-display area and a second non-display area which are positioned at two sides of the display area along the second direction; The display panel further comprises N source signal lines extending along the second direction, wherein the source signal lines are electrically connected with the data lines in a one-to-one correspondence manner, and the source signal lines are used for transmitting data signals input by the multiplexer to the corresponding data lines, wherein N is more than or equal to 3; the N source signal lines are arranged along the first direction, the first data line to the N data line are sequentially arranged along the direction far away from the first non-display area, the central source signal line is electrically connected with the N data line, the central source signal line is one source signal line positioned at the center of the N source signal lines along the first direction, the first data line to the N-1 data line are divided into M data line groups which are sequentially arranged, each data line group comprises two adjacent data lines, and the M data line group is adjacent to the N data line; And two source signal lines which are positioned at two sides of the central source signal line and are spaced from the central source signal line, wherein the number of the source signal lines is D, and the two source signal lines are electrically connected with two data lines in the M-D group of data lines in a one-to-one correspondence manner.
2. The display panel of claim 1, further comprising a binding structure for binding a driver chip; the binding structure is disposed within the first non-display area.
3. The display panel of claim 1, wherein the non-display area includes a first non-display area and a second non-display area located on both sides of the display area along the second direction; The grid driving circuit comprises a plurality of first shift registers positioned in the first non-display area and a plurality of second shift registers positioned in the second non-display area; the plurality of multiplexers includes a plurality of first multiplexers located in the first non-display area and a plurality of second multiplexers located in the second non-display area; The first multiplexers and the first shift registers are periodically arranged alternately along the first direction, and the second multiplexers and the second shift registers are periodically arranged alternately.
4. A display panel according to claim 3, further comprising a binding structure for binding the driver chip, the binding structure being disposed in a non-display area adjacent to the display area in the first direction.
5. The display panel of claim 4, wherein the N source signal lines include K first source signal lines correspondingly connected to the plurality of first multiplexers and arranged sequentially close to the bonding structure, and N-K second source signal lines correspondingly connected to the second multiplexers and arranged sequentially far from the bonding structure; the L-th first source signal line is electrically connected with the L-th data line, and L is more than or equal to 1 and less than or equal to K; The P second source signal line is electrically connected with the N-K data line, and P is more than or equal to 1 and less than or equal to N-K.
6. The display panel of claim 1, further comprising a lighting test circuit disposed in a non-display region adjacent to the display region along the second direction.
7. A display device, characterized in that the display device comprises the display panel according to any one of claims 1-6.

Description

Display panel and display device Technical Field The present invention relates to the field of display technologies, and in particular, to a display panel and a display device. Background With the development of display technology, the application of display panels is also becoming more and more widespread, and accordingly, the requirements on the display panels are also becoming higher and higher. The existing display panel has a larger lower frame, which limits the further application of the display panel. Disclosure of Invention The invention provides a display panel and a display device, which are used for solving the problem that the lower frame of the display panel is larger. According to an aspect of the present invention, there is provided a display panel including a display region and a non-display region surrounding the display region; n data lines extending along the first direction and arranged along the second direction are arranged in the display area; The display panel further comprises a plurality of multiplexers and a gate driving circuit, wherein the gate driving circuit and the plurality of multiplexers are arranged in a non-display area adjacent to the display area along the second direction; The display panel further comprises N source signal lines extending along the second direction, the source signal lines are electrically connected with the data lines in a one-to-one correspondence manner, the source signal lines are used for transmitting data signals input by the multiplexer to the corresponding data lines, and N is more than or equal to 3. Optionally, along the second direction, the non-display area comprises a first non-display area and a second non-display area which are positioned at two sides of the display area, the gate driving circuit is arranged in the second non-display area, and the multiple multiplexers are arranged in the first non-display area. Optionally, the display panel further includes a binding structure, where the binding structure is used to bind the driving chip; the binding structure is disposed within the first non-display area. The N source signal lines are arranged along the first direction, the first data line to the N data line are sequentially arranged along the direction far away from the first non-display area, the central source signal line is electrically connected with the N data line, the central source signal line is one source signal line positioned at the center of the N source signal line along the first direction, the first data line to the N-1 data line are divided into M data line groups sequentially arranged, each data line group comprises two adjacent data lines, and the M data line group is adjacent to the N data line; And two source signal lines which are positioned at two sides of the central source signal line and are spaced from the central source signal line, wherein the number of the source signal lines is D, and the two source signal lines are electrically connected with two data lines in the M-D group of data lines in a one-to-one correspondence manner. Optionally, along the second direction, the non-display area includes a first non-display area and a second non-display area located at two sides of the display area; The grid driving circuit comprises a plurality of first shift registers positioned in the first non-display area and a plurality of second shift registers positioned in the second non-display area; the plurality of multiplexers includes a plurality of first multiplexers located in the first non-display area and a plurality of second multiplexers located in the second non-display area; The first multiplexers and the first shift registers are periodically arranged alternately along the first direction, and the second multiplexers and the second shift registers are periodically arranged alternately. Optionally, the display panel further includes a binding structure, where the binding structure is used to bind the driving chip, and the binding structure is disposed in a non-display area adjacent to the display area along the first direction. Optionally, the N source signal lines include K first source signal lines correspondingly connected with the plurality of first multiplexers and sequentially arranged close to the binding structure, and N-K second source signal lines correspondingly connected with the second multiplexers and sequentially arranged far from the binding structure; the L-th first source signal line is electrically connected with the L-th data line, and L is more than or equal to 1 and less than or equal to K; The P second source signal line is electrically connected with the N-K data line, and P is more than or equal to 1 and less than or equal to N-K. Optionally, the display panel further includes a lighting test circuit, and the lighting test circuit is disposed in a non-display area adjacent to the display area along the second direction. Optionally, the N source signal lines are sequentially arrange