CN-116364167-B - Method for adjusting chip output characteristic parameter

CN116364167BCN 116364167 BCN116364167 BCN 116364167BCN-116364167-B

Abstract

The disclosure provides a method for adjusting chip output characteristic parameters, and relates to the technical field of semiconductors. The method comprises the steps of writing a first data set to be adjusted into a chip to be adjusted according to a data writing mode corresponding to data shielding, wherein at least part of data in the first data set to be adjusted is covered, reading the first read-out data set from the chip to be adjusted according to a data reading mode corresponding to the data shielding, and adjusting time sequence parameters of a test machine under the condition that the data read-write errors exist in the chip to be adjusted according to the first data set to be adjusted and the first read-out data set, so that output characteristic parameters of the chip to be adjusted are adjusted through adjustment of the time sequence parameters. According to the embodiment of the disclosure, the chip yield can be improved.

Inventors

XU LIANG
Lan Xuemeng

Assignees

长鑫存储技术有限公司

Dates

Publication Date: 20260508
Application Date: 20230331

Claims (9)

1. A method for adjusting output characteristic parameters of a chip, the method comprising: writing a first data set to be tested into a chip to be adjusted according to a data writing mode corresponding to data shielding, wherein at least part of data in the first data set to be tested is covered; Reading a first read data set from the chip to be adjusted according to a data reading mode corresponding to the data shielding; under the condition that the data read-write errors exist in the chip to be adjusted according to the first data set to be measured and the first read-out data set, adjusting the time sequence parameters of a test machine table so as to adjust the output characteristic parameters of the chip to be adjusted through the adjustment of the time sequence parameters; wherein the chip to be regulated comprises a first-in first-out FIFO register, And before the first data set to be tested is written into the chip to be adjusted according to the data writing mode corresponding to the data shielding, the method further comprises: Writing a preset data set into the FIFO register; reading a third read data set from the FIFO register; And adjusting the time sequence parameter under the condition that the chip to be adjusted has data reading errors according to the preset data set and the third reading data set.
2. The method of claim 1, wherein the timing parameters comprise timing parameters of a data strobe signal, The adjusting the time sequence parameter of the test machine under the condition that the chip to be adjusted has data read-write errors according to the first data set to be tested and the first read-out data set comprises the following steps: And under the condition that the data read-out errors exist in the chip to be adjusted according to the first data set to be measured and the first read-out data set, adjusting the time sequence parameters of the data strobe signals of the test machine table so as to adjust the clock offset value of the chip to be adjusted through the adjustment of the time sequence parameters of the data strobe signals, wherein the clock offset value is used for representing the offset value between the data strobe signals and the clock signals.
3. The method according to claim 2, wherein before the first data set to be tested is written to the chip to be adjusted according to the data writing mode corresponding to the data mask, the method further comprises: writing a second data set to be tested into the chip to be adjusted according to a data writing mode corresponding to data shielding, wherein the second data set to be tested is generated according to a preset data shielding rule, and at least part of data in the second data set to be tested is covered; Reading a second read data set from the chip to be adjusted according to a data reading mode corresponding to the data shielding; and under the condition that the data writing errors exist in the chip to be adjusted according to the second data set to be measured and the second read-out data set, adjusting a write clock of a test machine table so as to adjust the output characteristic parameters of the chip to be adjusted through adjustment of the write clock.
4. The method of claim 1, wherein the first set of data to be tested is generated according to a preset data masking rule comprising a plurality of data masking sub-rules, The first data set to be tested comprises multiple types of data sets, wherein each type of data set is generated by one data mask rule, and the number of the data masked in the different types of data sets is different.
5. The method of claim 4, wherein the plurality of classes of data sets comprises at least one of: the first type data set is generated according to a first data shielding sub-rule, wherein the first type data set comprises a plurality of first data sets, the hidden data of any two first data sets are different, and the first data shielding sub-rule is used for shielding one data in each first data set; A second class of data sets generated according to a second data mask sub-rule, wherein the second class of data sets comprises a plurality of second data sets, at least one of any two second data sets is different in masked data, and the second data mask sub-rule is used for masking four data in each second data set; And a third class of data set generated according to a third data mask sub-rule, wherein the third class of data set comprises a plurality of third data sets, at least one of any two third data sets is different by covering data, and the third data mask sub-rule is used for covering eight data in each third data set.
6. The method of claim 1, wherein adjusting the timing parameters of the test station comprises: Adjusting the time sequence parameter of the test machine by a target adjustment amount to obtain an adjusted time sequence parameter so as to adjust the output characteristic parameter of the chip to be adjusted; Writing the first data set to be tested into the chip to be adjusted after characteristic parameter adjustment according to the data writing mode corresponding to the data mask; Reading a new first read data set from the chip to be adjusted after the characteristic parameter adjustment according to the data reading mode corresponding to the data shielding; And returning to the step of adjusting the target adjustment amount of the time sequence parameter of the test machine under the condition that the data read-write errors exist in the chip to be adjusted after the characteristic parameter adjustment according to the first data set to be tested and the new first read-out data set until the data read-write errors of the chip to be adjusted after the characteristic parameter adjustment are determined according to the first data set to be tested and the new first read-out data set.
7. The method of claim 6, wherein the step of providing the first layer comprises, The adjusting the target adjustment amount for the time sequence parameter of the test machine to obtain the adjusted time sequence parameter comprises the following steps: and in the range of the variation of the preset time sequence parameter, increasing the target adjustment amount on the basis of the time sequence parameter before adjustment to obtain the time sequence parameter after adjustment.
8. The method of claim 1, wherein the test station is configured to sequentially adjust the plurality of chips, After the time sequence parameters of the test machine are adjusted, the method further comprises the following steps: under the condition that the data of the chip to be adjusted is read correctly through the adjustment of the time sequence parameters, taking the next chip of the chips to be adjusted as a new chip to be adjusted; writing the first data set to be tested into the new chip to be adjusted according to a data writing mode corresponding to data shielding; reading data of the new chip to be adjusted according to a data reading mode corresponding to the data shielding to obtain a new first reading data set; And under the condition that the new chip to be adjusted has data reading errors according to the first data set to be measured and the new first reading data set, adjusting the time sequence parameters of the test machine until the new chip to be adjusted has correct data reading, taking the next chip of the new chip to be adjusted as the new chip to be adjusted, returning to the step of writing the first data set to be adjusted into the chip to be adjusted according to the data writing mode corresponding to the data shielding until the fact that the data reading of the chips is correct is confirmed, and recording the adjusted time sequence parameters corresponding to each chip.
9. The method of claim 1, wherein each first data set to be tested comprises N data, the chip to be tuned comprises N data mask pins and N data transfer pins, N is any integer; the writing of the first data set to be tested to the chip to be adjusted according to the data writing mode corresponding to the data shielding comprises the following steps: for the ith data in the first data set to be tested, executing the following steps, wherein i is any positive integer less than or equal to N: transmitting the ith data to an ith data transmission pin of the chip to be adjusted; transmitting a level signal corresponding to a masking state of the ith data to an ith data masking pin of the chip to be adjusted, so that the chip to be adjusted decides whether to mask and write the ith data according to the level signal of the ith data masking pin after receiving the ith data through the ith data transmission pin, The level signal is a first level signal when the ith data is in a covering state, and is a second level signal when the ith data is in a high-level non-covering state.

Description

Method for adjusting chip output characteristic parameter Technical Field The disclosure relates to the field of semiconductor technology, and in particular, to a method for adjusting output characteristic parameters of a chip. Background In the process of manufacturing chips, the chips often need to be tested in the last link to ensure the quality of the manufactured chips. In the testing process, in order to ensure the functional integrity of the chip, the yield of the chip can be improved through optimizing the output performance of the chip in the finished product test (FINAL TEST, FT). However, the existing adjustment scheme cannot accurately adjust the output performance parameters of the chip, so that the chip yield is low. Therefore, how to improve the chip yield through accurate adjustment of the chip output characteristics becomes a technical problem to be solved. It should be noted that the information disclosed in the above background section is only for enhancing understanding of the background of the present disclosure and thus may include information that does not constitute prior art known to those of ordinary skill in the art. Disclosure of Invention The disclosure provides a method for adjusting chip output characteristic parameters, which at least overcomes the problem of low chip yield due to the fact that the chip output performance cannot be accurately adjusted in the related art. Other features and advantages of the present disclosure will be apparent from the following detailed description, or may be learned in part by the practice of the disclosure. According to one aspect of the present disclosure, there is provided a method for adjusting an output characteristic parameter of a chip, including: Writing a first data set to be tested into the chip to be adjusted according to a data writing mode corresponding to the data shielding, wherein at least part of data in the first data set to be tested is covered; reading a first read data set from the chip to be adjusted according to a data reading mode corresponding to the data shielding; And under the condition that the data read-write errors exist in the chip to be adjusted according to the first data set to be measured and the first read-out data set, adjusting the time sequence parameters of the test machine to adjust the output characteristic parameters of the chip to be adjusted through adjustment of the time sequence parameters. In one embodiment, the timing parameters include timing parameters of a data strobe signal, Under the condition that the data read-write errors exist in the chip to be adjusted according to the first data set to be measured and the first read-out data set, adjusting the time sequence parameters of the test machine comprises the following steps: Under the condition that the data reading errors exist in the chip to be adjusted according to the first data set to be measured and the first reading data set, adjusting the time sequence parameters of the data strobe signals of the test machine to adjust the clock deviation value of the chip to be adjusted through adjustment of the time sequence parameters of the data strobe signals, wherein the clock deviation value is used for representing the deviation value between the data strobe signals and the clock signals. In one embodiment, before writing the first to-be-tested data set to the to-be-adjusted chip according to the data writing mode corresponding to the data mask, the method further includes: Writing a second data set to be tested into the chip to be adjusted according to a data writing mode corresponding to the data shielding, wherein the second data set to be tested is generated according to a preset data shielding rule, and at least part of data in the second data set to be tested is covered; reading a second read data set from the chip to be adjusted according to a data reading mode corresponding to the data shielding; And under the condition that the data writing errors exist in the chip to be adjusted according to the second data set to be measured and the second read-out data set, adjusting the write clock of the test machine to adjust the output characteristic parameters of the chip to be adjusted through adjustment of the write clock. In one embodiment, the chip to be tuned includes a first-in first-out FIFO register, And before the first data set to be tested is written into the chip to be adjusted according to the data writing mode corresponding to the data shielding, the method further comprises the following steps: writing a preset data set into the FIFO register; reading out a third read-out data set from the FIFO register; and under the condition that the data read-out errors of the chip to be adjusted exist according to the preset data set and the third read-out data set, adjusting the time sequence parameters. In one embodiment, the first set of data to be tested is generated according to a preset data masking rule, the preset data masking r