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CN-116469945-B - TOPCon battery and preparation method thereof

CN116469945BCN 116469945 BCN116469945 BCN 116469945BCN-116469945-B

Abstract

The invention provides a TOPCon battery which comprises a doped polysilicon layer, wherein the doped polysilicon layer comprises a first doped polysilicon region and a second doped polysilicon alloy region, the first doped polysilicon region is selected from phosphorus doped polysilicon, the second doped polysilicon alloy region is selected from phosphorus doped polysilicon alloyed by at least one element of oxygen, carbon and nitrogen, the doping concentration of the first doped polysilicon region is not lower than 1E20cm ‑3 , the forbidden bandwidth of the second doped polysilicon alloy region is larger than that of the first doped polysilicon region, and the doping concentration of the second doped polysilicon alloy region is smaller than that of the first doped polysilicon region. The TOPCon battery structure provided by the invention can ensure the thickness of doped polysilicon of a metal contact area, avoid the damage of a tunneling oxide layer in the slurry sintering process, reduce the composite current and contact resistance, and simultaneously reduce the light parasitic absorption of a non-metal area, in particular to reduce the free carrier absorption.

Inventors

  • MAO WEIPING
  • JIN ZHU
  • ZHANG MINGMING
  • GUO SHICHENG
  • FAN XUAN
  • FU SHAOJIAN
  • YANG YANG
  • YE FENG
  • PAN LIMIN

Assignees

  • 滁州捷泰新能源科技有限公司

Dates

Publication Date
20260512
Application Date
20230427

Claims (8)

  1. 1. A method of making TOPCon battery comprising: Sequentially preparing a tunneling layer and an intrinsic amorphous silicon layer on the lower surface of a monocrystalline silicon wafer; injecting ion elements into the position of the back non-metal contact area of TOPCon battery corresponding to the intrinsic amorphous silicon layer by using an ion injection mode through shielding of a mask plate, and converting the intrinsic amorphous silicon layer into an amorphous alloy silicon layer, wherein the ion elements are at least one selected from oxygen, carbon and nitrogen; Forming a first doped polysilicon region and a second doped polysilicon region, wherein the first doped polysilicon region corresponds to the back metal contact region, and the second doped polysilicon region corresponds to the back non-metal contact region; The thickness of the first doped polysilicon region is consistent with that of the second doped polysilicon region, and the doping concentration of the second doped polysilicon region is smaller than that of the first doped polysilicon region.
  2. 2. The preparation method of claim 1, wherein the ion energy of the ion implantation is selected from 20-30 keV, and the ion implantation amount is selected from 1E 17ions/cm 2 ~5 E17ions/cm 2 .
  3. 3. A TOPCon battery prepared by the method of claim 1 or 2, comprising: The doped polysilicon layer comprises a first doped polysilicon region and a second doped polysilicon alloy region; the first doped polysilicon region is selected from phosphorus doped polysilicon; The second doped polycrystalline alloy silicon region is phosphorus doped polycrystalline silicon alloyed by at least one element selected from oxygen, carbon and nitrogen; the thickness of the first doped polysilicon region is selected from 100-200 nm; the forbidden band width of the second doped polycrystalline alloy silicon region is larger than that of the first doped polycrystalline silicon region.
  4. 4. The TOPCon battery of claim 3, wherein the first doped polysilicon region has a doping concentration of not less than 1E20cm -3 .
  5. 5. The TOPCon battery of claim 4, wherein the doping concentration of the first doped polysilicon region is selected from 1e 20cm -3 ~3E20cm -3 .
  6. 6. The TOPCon battery of claim 4, wherein the doping concentration of the second doped polysilicon alloy region is selected from 1 e19cm -3 ~5E19cm -3 .
  7. 7. The TOPCon battery of claim 3, wherein the second doped polysilicon region has a forbidden bandwidth selected from 1.9-2.2 ev.
  8. 8. The battery of claim TOPCon, wherein the first doped polysilicon region is disposed on the back side of the single crystal silicon wafer with the metal electrode at a location corresponding to the tunneling layer.

Description

TOPCon battery and preparation method thereof Technical Field The invention belongs to the technical field of batteries, and particularly relates to a TOPCon battery and a preparation method thereof. Background TOPCon the back side of the cell is typically made with an Ag paste that burns through the SiNx dielectric film to form an ohmic contact with the doped polysilicon. In the slurry sintering process, metal Ag crystal grains possibly penetrate through the doped polysilicon film layer to damage the passivation effect of the interface oxide layer, enough doped polysilicon thickness is needed to reduce the composite current density of the metal contact region, usually 100-150 nm, and enough doping concentration is needed to ensure good field passivation effect and low ohmic contact, usually >1e20cm -3. The doped polysilicon has overlarge film thickness and doping concentration, so that the loss of TOPCon short-circuit current of the battery can be caused due to Free Carrier Absorption (FCA) of the doped polysilicon to long-wave light, and the double-sided rate of the battery can be reduced due to parasitic absorption of the doped polysilicon to back incident light. The thickness and doping concentration of the doped polysilicon are difficult to balance between recombination, resistance loss and optical loss. Disclosure of Invention In view of the above, the present invention aims to provide a TOPCon battery and a preparation method thereof, and the TOPCon battery provided by the present invention can reduce the optical parasitic absorption of a non-metal region, especially the free carrier absorption, while reducing the composite current and the contact resistance. The invention provides a TOPCon battery, comprising: a doped polysilicon layer; The doped polysilicon layer comprises a first doped polysilicon region and a second doped polysilicon alloy region; the first doped polysilicon region is selected from phosphorus doped polysilicon; The second doped polycrystalline alloy silicon region is phosphorus doped polycrystalline silicon alloyed by at least one element selected from oxygen, carbon and nitrogen; the thickness of the first doped polysilicon region is selected from 100-200 nm. In the embodiment of the invention, other layer structures of the TOPCon battery can be arranged according to structures of TOPCon batteries well known to those skilled in the art, for example, a diffusion layer, a passivation layer, a front anti-reflection layer and a front metal electrode can be sequentially arranged on the front surface of monocrystalline silicon, and a tunneling layer, a doped polycrystalline silicon layer, a back anti-reflection layer and a back metal electrode can be sequentially arranged on the back surface of monocrystalline silicon. In the embodiment of the invention, the monocrystalline silicon wafer can be a phosphorus doped N-type monocrystalline silicon wafer, the resistivity can be 0.1-10 ohm cm, such as 0.5 ohm cm, 1 ohm cm, 2 ohm cm, 4 ohm cm, 6 ohm cm and 8 ohm cm, and the thickness can be 100-200 micrometers, such as 120 micrometers, 140 micrometers, 160 micrometers and 180 micrometers. In the embodiment of the invention, the diffusion layer may be a P-type doped layer formed by boron doping, and the sheet resistance may be selected from 100 to 300 Ω, such as 150Ω,200Ω, 250Ω. In the embodiment of the invention, the passivation layer can be selected from an alumina layer, and the thickness of the passivation layer can be selected from 2-6 nm, such as 3nm, 4nm and 5nm. In the embodiment of the invention, the front side anti-reflection layer can be selected from a composite film formed by one or more of a silicon nitride layer, a silicon oxynitride layer and a silicon oxide layer, the (total) thickness of the front side anti-reflection layer can be selected from 70-120 nm, such as 80nm, 90nm, 100nm and 110nm, and the (comprehensive) refractive index of the front side anti-reflection layer can be selected from 1.9-2.1, such as 2.0. In an embodiment of the present invention, the refractive index of the front-side anti-reflection layer may be sequentially decreased in the direction away from the monocrystalline silicon piece. In an embodiment of the invention, the front side metal electrode may be selected from AgAl gate line electrodes. In the embodiment of the invention, the tunneling layer may be a silicon oxide layer, and the thickness of the tunneling layer may be 1-3 nm, such as 2nm. In the embodiment of the invention, a first doped polysilicon region (which can be marked as a first doped polysilicon layer) is arranged at a position corresponding to a metal electrode in the TOPCon battery, the first doped polysilicon region can be arranged at a position corresponding to a tunneling layer on a back metal electrode of a monocrystalline silicon wafer, a second doped polysilicon alloy region (which can be marked as a second doped polysilicon layer) is arranged at a position corresponding to th