CN-116487371-B - Preparation method of miniature pyramid inductor

CN116487371BCN 116487371 BCN116487371 BCN 116487371BCN-116487371-B

Abstract

The invention relates to a preparation method of a miniature pyramid inductor, and belongs to the technical field of nano electronic devices. The preparation method comprises the steps of (1) sequentially depositing a sacrificial layer and a stress layer on a silicon substrate, (2) determining an operation table through first photoetching by adopting an inductively coupled plasma etching method, (3) depositing a metal layer through second photoetching by adopting an electron beam evaporation coating method, and depositing a protective layer by adopting an atomic layer layering method, (4) determining an etching window through third photoetching, etching the sacrificial layer to trigger a film to self-curl to obtain a standard self-curling inductor, and (5) annealing the standard self-curling inductor to generate stress difference to obtain the pyramid inductor. The miniature pyramid inductor has large self-resonant frequency and quality factor, good use effect in a wide frequency band, small size and adjustable structural parameters.

Inventors

HUANG WEN
LI LONGYU
WANG QIZHEN
SANG LEI

Assignees

合肥工业大学

Dates

Publication Date: 20260512
Application Date: 20230310

Claims (3)

1. The preparation method of the miniature pyramid inductor is characterized by comprising the following operation steps: (1) Depositing a sacrificial layer and a stress layer sequentially on a silicon substrate Depositing a germanium sacrificial layer (2) on a silicon substrate (1) by adopting an electron beam evaporation coating method, and sequentially depositing stress layers of double-frequency silicon nitride on the germanium sacrificial layer (2) by adopting a Plasma Enhanced Chemical Vapor Deposition (PECVD) method, wherein the stress layers of the double-frequency silicon nitride consist of a low-frequency silicon nitride layer (3) and a high-frequency silicon nitride layer (4); (2) First lithography determination station (2.1) First gumming, exposing and developing Coating liquid phase positive photoresist on the high frequency silicon nitride layer (4) by using a spin coating method to form a first photoresist layer (5), shielding the photoresist part to be reserved by using a contact photoetching machine, exposing, developing and removing the exposed photoresist part to obtain a substrate of which part of the high frequency silicon nitride layer (4) is exposed; (2.2) ICP etching, photoresist removal Using an ICP-601 type inductively coupled plasma etching machine, taking the developed first photoresist layer (5) as a mask, and removing the high-frequency silicon nitride layer (4), the low-frequency silicon nitride layer (3) and the germanium sacrificial layer (2) on the periphery of the first photoresist layer (5) from top to bottom through ICP etching; removing the first photoresist layer (5) in the photoresist removing solution to obtain an operation table formed by the high-frequency silicon nitride layer (4), the low-frequency silicon nitride layer (3) and the germanium sacrificial layer (2) remained on the silicon substrate (1); (3) Depositing a metal layer and a protective layer by second photoetching (3.1) Second gumming, exposing and developing Coating liquid phase negative photoresist on an operation table of a silicon substrate (1) by using a rotary photoresist coating method to form a second photoresist layer (8), shielding a photoresist part to be removed by using a contact type photoetching machine, exposing, developing and removing an unexposed photoresist part, and forming a first hollowed-out pattern (10) on a high-frequency silicon nitride layer (4), wherein the first hollowed-out pattern 10 is a serpentine pattern; (3.2) gold plating, photoresist removal Depositing a metal conductive layer (11) on the second photoresist layer (8) by using electron beam evaporation equipment, filling the metal conductive layer (11) into the first hollowed-out pattern (10), putting the photoresist layer into a photoresist removing solution to remove the second photoresist layer (8) and the metal conductive layer (11) except gold filled in the first hollowed-out pattern (10), and forming a snake-shaped metal conductive strip (12) along the length direction of the operation table; (3.3) deposition of an alumina (Al 2 O 3 ) protective layer An Atomic Layer Deposition (ALD) technology is utilized to deposit an aluminum oxide layer (13) on the surface of the silicon substrate (1), the surface of the operating platform and the surface of the metal conducting strip (12), and the thickness of the aluminum oxide layer (13) is 5-20 nm; (4) Determining etching window and etching sacrificial layer by third photoetching (4.1) Third gumming, exposing and developing Coating liquid phase negative photoresist on the alumina layer (13) by using a rotary photoresist coating method to form a third photoresist layer (15), shielding the photoresist part to be removed by using a contact type photoetching machine, exposing, developing and removing the unexposed photoresist part, and forming a strip-shaped hollowed-out pattern (17) on one side of the length direction of the operation table, wherein the strip-shaped hollowed-out pattern (17) is parallel to the length direction of the serpentine metal conducting strip (12); (4.2) inductively coupled plasma etching, photoresist removal Using an ICP-601 type inductively coupled plasma etching machine, and taking the third photoresist layer (15) as a mask, etching from top to bottom to remove the aluminum oxide layer (13), the high-frequency silicon nitride layer (4), the low-frequency silicon nitride layer (3) and the germanium sacrificial layer (2) below the strip-shaped hollowed-out pattern (17); removing the third photoresist layer (15) in the photoresist removing solution to obtain etching windows (18) exposing the silicon substrate (1), the sacrificial layer germanium (2), the low-frequency silicon nitride layer (3) and the high-frequency silicon nitride layer (4); (4.3) removing the sacrificial layer Immersing the substrate in the step (4.2) in 30% hydrogen peroxide solution by wet etching, enabling hydrogen peroxide to enter an etching window (18), performing reactive etching with the sacrificial layer germanium (2), and inwards curling the low-frequency silicon nitride layer (3), the high-frequency silicon nitride layer (4) and the metal conducting strip (12) into micro-tubes under the double-frequency stress action of the low-frequency silicon nitride layer (3) and the high-frequency silicon nitride layer (4) to obtain a standard self-curling inductor; (5) Annealing Annealing the standard self-curling inductor by using tubular annealing furnace equipment, wherein the annealing temperature is 300-600 ℃ and the annealing time is 30-150 s, so as to obtain a miniature pyramid inductor; The curling axial inner diameter of the miniature pyramid inductor is 50-100um, the curling turns are one to five, the gap between every two adjacent turns is 0-15um, the quality factor is 5-17, and the self-resonant frequency is 14GHz-17.2GHz.
2. The preparation method of the miniature pyramid inductor is characterized in that in the step (1), the thickness of the germanium sacrificial layer (2) is 15-35nm, the preparation operation of the low-frequency silicon nitride layer (3) is carried out by adopting a plasma enhanced chemical vapor deposition method, the mixed gas is prepared by uniformly mixing 30% of silane, 35% of nitrogen and 35% of ammonia in a mixed atmosphere environment, the low-frequency silicon nitride layer (3) is generated by depositing at a low frequency of 380KHz, the preparation operation of the high-frequency silicon nitride layer (4) is carried out by adopting a plasma enhanced chemical vapor deposition method, the mixed gas is prepared by uniformly mixing 30% of silane, 35% of nitrogen and 35% of ammonia in a mixed atmosphere environment, the thickness of the low-frequency silicon nitride layer (3) and the thickness of the high-frequency silicon nitride layer (4) are both 6-40nm.
3. The method of manufacturing a micro pyramid inductor according to claim 1, wherein in the step (3), the metal conductive strip (12) is in a serpentine pattern, and the thickness of the metal conductive strip (12) is 10-130nm.

Description

Preparation method of miniature pyramid inductor Technical Field The invention belongs to the technical field of nano electronic devices, and particularly relates to a broadband miniature pyramid inductor and a preparation process method thereof. Background Along with the development of technology, electronic components are more and more, and meanwhile, the miniaturization is also being developed, and the inductor has wide application in the field of radio frequency integrated circuits, is widely applied to the fields of filters, voltage-controlled oscillators, low-noise amplifiers, power amplifiers and the like, and is one of the main challenges of miniaturization of integrated circuits for realizing on-chip passive inductors with high frequency and high quality factors. The planar spiral inductor is easy to integrate, has low cost and is mostly applied to radio frequency integrated circuits, but the planar spiral inductor of 10nH generally occupies 400 multiplied by 400 mu m, is unfavorable for realizing miniaturization of electronic components, and meanwhile, larger parasitic coupling capacitance can be introduced into the planar spiral inductor in the preparation process. The existing standard self-curling inductor is prepared by sequentially depositing germanium and low-frequency and high-frequency silicon nitride layers on a silicon substrate, determining a table surface by utilizing Reactive Ion Etching (RIE) for the first time, depositing a metal layer by utilizing an electron beam evaporation technology, etching a serpentine metal pattern by utilizing the second time, laminating an aluminum oxide protective layer by utilizing an atomic layer laminating technology, determining an etching window by utilizing the third time of photoetching, removing a germanium sacrificial layer, triggering a film self-curling process, and obtaining the standard self-curling inductor. The standard self-curling inductor obtained by the preparation method reduces the size of a device and the occupied area of the inductor, but has the defects of low resonant frequency and low quality factor of the inductor. The standard self-curling inductance of 2nH for two turns of a six-unit has a quality factor of only 5 and a resonant frequency of only 15GHz. The standard self-curling inductor has lower quality factor, larger resistance, smaller current at the resonance point of the resonant circuit, poorer signal selectivity of the circuit, and lower self-resonance frequency of the standard self-curling inductor is not beneficial to improving the bandwidth. The standard self-curling inductor solves the problem of overlarge occupied area of the inductor, but the defects of low quality factor and low resonant frequency still exist. Disclosure of Invention In order to solve the problems of low self-resonant frequency and low quality factor of the self-curling inductor, the invention provides a preparation method of a miniature pyramid inductor. A preparation method of a miniature pyramid inductor comprises the following operation steps: (1) Depositing a sacrificial layer and a stress layer sequentially on a silicon substrate Depositing a germanium sacrificial layer 2 on a silicon substrate 1 by adopting an electron beam evaporation coating method, and sequentially depositing stress layers of double-frequency silicon nitride on the germanium sacrificial layer 2 by adopting a Plasma Enhanced Chemical Vapor Deposition (PECVD) method, wherein the stress layers of the double-frequency silicon nitride consist of a low-frequency silicon nitride layer 3 and a high-frequency silicon nitride layer 4; (2) First lithography determination station (2.1) First gumming, exposing and developing Coating liquid phase positive photoresist on the high frequency silicon nitride layer 4 by using a spin coating method to form a first photoresist layer 5, shielding the photoresist part to be reserved by using a contact type photoetching machine, exposing, developing and removing the exposed photoresist part to obtain a substrate of which part of the high frequency silicon nitride layer 4 is exposed; (2.2) ICP etching, photoresist removal Using an ICP-601 type inductively coupled plasma etching machine, taking the developed first photoresist layer 5 as a mask, and removing the high-frequency silicon nitride layer 4, the low-frequency silicon nitride layer 3 and the germanium sacrificial layer 2 on the periphery of the first photoresist layer 5 from top to bottom through ICP etching; removing the first photoresist layer 5 from the photoresist stripping solution to obtain an operation table formed by the high-frequency silicon nitride layer 4, the low-frequency silicon nitride layer 3 and the germanium sacrificial layer 2 which are remained on the silicon substrate 1; (3) Depositing a metal layer and a protective layer by second photoetching (3.1) Second gumming, exposing and developing Coating liquid phase negative photoresist on an operation table of a silicon