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CN-116501127-B - Current bias circuit, chip and corresponding electronic device

CN116501127BCN 116501127 BCN116501127 BCN 116501127BCN-116501127-B

Abstract

The invention relates to the technical field of integrated circuits, in particular to a current bias circuit, a chip and a corresponding electronic device, wherein the circuit comprises a P-type MOSFET current mirror module, a third end of the P-type MOSFET current mirror module is connected with a P-type quick starting module, and the P-type quick starting module comprises a plurality of capacitors and a plurality of switches; the third end of the N-type MOSFET current mirror module is connected with the N-type quick starting module, and the N-type quick starting module comprises a plurality of capacitors and a plurality of switches. According to the circuit, the capacitors are added into the current bias circuit comprising the cascode current mirror, so that the key nodes can be quickly built to be near the target value based on the charge sharing effect among the capacitors, the starting speed is increased, the current overshoot is reduced, and the resistance in the circuit can be reduced.

Inventors

  • HOU JIALI
  • YUAN YIDONG
  • HU YI
  • ZHAO TIANTING
  • LI ZHENGUO
  • WANG YABIN
  • SU MENG
  • SU WEI
  • SONG HAIFEI

Assignees

  • 北京智芯微电子科技有限公司

Dates

Publication Date
20260512
Application Date
20230428

Claims (13)

  1. 1. A current bias circuit, the current bias circuit comprising: The first end of the P-type MOSFET current mirror module is connected with the power supply voltage, the second end of the P-type MOSFET current mirror module is connected with the first bias voltage, the third end of the P-type MOSFET current mirror module is connected with the P-type quick starting module, and the fourth end of the P-type MOSFET current mirror module outputs P-type bias current through the first switch group; The P-type quick starting module is connected to the fifth end of the P-type quick starting module through a first control switch and comprises a plurality of capacitors and a plurality of switches, and the P-type quick starting module is used for accelerating the starting speed of the P-type MOSFET current mirror module through the plurality of capacitors and the plurality of switches; The first end of the N-type MOSFET current mirror module is connected with the grounding end, the second end of the N-type MOSFET current mirror module is connected with the second bias voltage, the third end of the N-type MOSFET current mirror module is connected with the N-type quick starting module, the fourth end of the N-type MOSFET current mirror module outputs N-type bias current through the second switch group, and the fifth end of the N-type MOSFET current mirror module is connected with the sixth end of the P-type MOSFET current mirror module through the second control switch; the N-type quick starting module is connected to the fifth end of the N-type MOSFET current mirror module through the second control switch and comprises a plurality of capacitors and a plurality of switches, and the N-type quick starting module is used for accelerating the starting speed of the N-type MOSFET current mirror module through the plurality of capacitors and the plurality of switches; The P-type quick starting module comprises a first capacitor, a second capacitor, a first switch, a second switch, a third switch, a fourth switch, a fifth switch and a sixth switch, wherein the first end of the first capacitor is connected with a power supply voltage through the third switch, is connected with the third end of the P-type MOSFET current mirror module through the second switch, is connected with a grounding end through the first switch, the second end of the first capacitor is connected with the grounding end through the fourth switch, is connected with the grounding end through the fifth switch and the sixth switch, is connected with the first end of the second capacitor through the fifth switch, is connected with the fifth end of the P-type quick starting module through the fifth switch and the first control switch, and the second end of the second capacitor is connected with the third end of the P-type MOSFET current mirror module; When the current bias circuit is started, the first switch and the third switch are switched from the closed state to the open state, and after a first preset time period is delayed, the fourth switch and the sixth switch are switched from the closed state to the open state, while the first control switch, the second control switch, the first switch group and the second switch group are switched from the open state to the closed state, and after a second preset time period is delayed, the second switch and the fifth switch are switched from the open state to the closed state.
  2. 2. The circuit of claim 1, wherein the fifth terminal of the P-type MOSFET current mirror module is further connected to ground via the first control switch and the first resistor.
  3. 3. The circuit of claim 1, wherein the N-type fast start module comprises a third capacitor, a fourth capacitor, a seventh switch, an eighth switch, a ninth switch, a tenth switch, an eleventh switch, and a twelfth switch, wherein: the first end of the third capacitor is connected with the power supply voltage through a ninth switch, is connected with the fifth end of the N-type MOSFET current mirror module through an eighth switch and is connected with the power supply voltage through a seventh switch; The second end of the third capacitor is connected to the ground end through a tenth switch, is connected to the power supply voltage through an eleventh switch and a twelfth switch, and is connected to the first end of the fourth capacitor and the third end of the N-type MOSFET current mirror module through the eleventh switch; The second end of the fourth capacitor is connected to the fifth end of the N-type MOSFET current mirror module through the second control switch.
  4. 4. The circuit of claim 3 wherein the seventh switch and the ninth switch from a closed state to an open state upon activation of the current biasing circuit and wherein the tenth switch and the twelfth switch from a closed state to an open state after a delay of a first predetermined period of time, and simultaneously, the first control switch, the second control switch, the first switch group and the second switch group are switched from an open state to a closed state, and the eighth switch and the eleventh switch are switched from the open state to the closed state after a delay of a second preset time period.
  5. 5. The circuit of any of claims 1-4, wherein the P-type MOSFET current mirror module comprises: The first group of P-type MOSFETs are connected with the first end of the P-type MOSFET current mirror module through first parasitic capacitances, and the grid electrode of the first P-type MOSFET in the first group of P-type MOSFETs is connected with the third end of the P-type MOSFET current mirror module; The grid electrodes of the second group of P-type MOSFETs are connected to the second end of the P-type MOSFET current mirror module, the source electrode of each P-type MOSFET in the second group of P-type MOSFETs is connected to the drain electrode of a corresponding P-type MOSFET in the first group of P-type MOSFETs, the drain electrode of the first P-type MOSFET in the second group of P-type MOSFETs is connected to the fifth end of the P-type MOSFET current mirror module, and the drain electrode of the second P-type MOSFET in the second group of P-type MOSFETs is connected to the sixth end of the P-type MOSFET current mirror module; The drains of the other P-type MOSFETs except the first P-type MOSFET and the second P-type MOSFET in the second group of P-type MOSFETs are respectively connected to the fourth end of the P-type MOSFET current mirror module, and different P-type bias currents are output through a corresponding switch in the first switch group.
  6. 6. The circuit of any of claims 1-4, wherein the N-type MOSFET current mirror module comprises: The first group of N-type MOSFETs are connected with the first end of the N-type MOSFET current mirror module through the second parasitic capacitance, and the grid electrode of the first N-type MOSFET in the first group of N-type MOSFETs is connected with the third end of the N-type MOSFET current mirror module; The grid electrodes of the second group of N-type MOSFETs are connected to the second end of the N-type MOSFET current mirror module, the source electrode of each N-type MOSFET in the second group of N-type MOSFETs is connected to the drain electrode of a corresponding N-type MOSFET in the first group of N-type MOSFETs, and the drain electrode of the first N-type MOSFET in the second group of N-type MOSFETs is connected to the fifth end of the N-type MOSFET current mirror module; the drains of the N-type MOSFETs except the first N-type MOSFET in the second group are respectively connected to the fourth end of the N-type MOSFET current mirror module, and different N-type bias currents are output through a corresponding switch in the second switch group.
  7. 7. A current bias circuit, the current bias circuit comprising: The first end of the P-type MOSFET current mirror module is connected with the power supply voltage, the second end of the P-type MOSFET current mirror module is connected with the third bias voltage, the third end of the P-type MOSFET current mirror module is connected with the ground end through the first target switch, and the fourth end of the P-type MOSFET current mirror module outputs P-type bias current through the third switch group; The first end of the N-type MOSFET current mirror module is connected with the grounding end, the second end of the N-type MOSFET current mirror module is connected with the fourth bias voltage, the third end of the N-type MOSFET current mirror module is connected with the power voltage through the second target switch, the fourth end of the N-type MOSFET current mirror module outputs N-type bias current through the fourth switch group, and the fifth end of the N-type MOSFET current mirror module is connected with the fifth end of the P-type MOSFET current mirror module through the third control switch; The sixth end of the P-type MOSFET current mirror module is connected to the ground end through a fourth control switch, a third target switch and a second resistor, and is connected to the third end of the P-type MOSFET current mirror module through the fourth control switch, and the sixth end of the N-type MOSFET current mirror module is connected to the fifth end of the N-type MOSFET current mirror module through the third control switch.
  8. 8. The circuit of claim 7, wherein upon activation of the current bias circuit, the first and second target switches switch from a closed state to an open state while the third, fourth, and third target switches switch from an open state to a closed state, and wherein the third and fourth switch sets switch from an open state to a closed state after a delay of a third preset period of time.
  9. 9. The circuit of claim 7 or 8, wherein the P-type MOSFET current mirror module and the N-type MOSFET current mirror module are both cascode current mirrors.
  10. 10. The current bias circuit is characterized by comprising a P-type MOSFET module and an N-type MOSFET module, wherein the P-type MOSFET module comprises M P-type MOSFETs and fifth parasitic capacitances, and the N-type MOSFET module comprises S N-type MOSFETs and sixth parasitic capacitances, wherein M is an integer greater than 2, and S is an integer greater than or equal to 2; The sources of the M P-type MOSFETs are connected to a power supply voltage, the grid electrodes are connected to the power supply voltage through first parasitic capacitors, the grid electrode of a first P-type MOSFET in the M P-type MOSFETs is connected to a grounding end through a fourth target switch, the drain electrode of the first P-type MOSFET is connected to the grid electrode of the first P-type MOSFET through a fifth target switch, and the drain electrode of the first P-type MOSFET is connected to the grounding end through a third resistor and a sixth target switch; The source electrodes of the S N-type MOSFETs are all connected to the grounding end, the grid electrodes of the S N-type MOSFETs are all connected to the grounding end through the sixth parasitic capacitance, the grid electrode of a first N-type MOSFET in the S N-type MOSFETs is connected to the power supply voltage through a seventh target switch, and the drain electrode of the first N-type MOSFET is connected to the grid electrode of the first N-type MOSFET through an eighth target switch and is connected to the drain electrode of a second P-type MOSFET in the M P-type MOSFETs; the drain electrode of each of the other P-type MOSFETs except the first P-type MOSFET and the second P-type MOSFET outputs different P-type bias currents through corresponding switches in a fifth switch group, and the drain electrode of each of the other N-type MOSFETs except the first N-type MOSFET outputs different N-type bias currents through corresponding switches in a sixth switch group.
  11. 11. The circuit of claim 10, wherein upon activation of the current bias circuit, the fourth and seventh target switches switch from a closed state to an open state while the fifth and eighth target switches and the sixth target switch from an open state to a closed state, and wherein the fifth and sixth switch sets switch from an open state to a closed state after a delay of a fourth preset period of time.
  12. 12. A chip comprising a current biasing circuit according to any one of claims 1 to 11.
  13. 13. An electronic device comprising the chip of claim 12.

Description

Current bias circuit, chip and corresponding electronic device Technical Field The present disclosure relates to the field of integrated circuits, and in particular, to a current bias circuit, a chip, and a corresponding electronic device. Background Multiple current biases are required in some analog circuits such as comparators and amplifiers, and bias currents are provided for some common analog circuit modules such as comparators and amplifiers through bias circuits. In the practical application scenarios with high requirements for power consumption, such as battery-powered chips, multi-stage digital-to-analog converters, etc., the bias circuit needs to be started and completed in a short time. For the conventional current bias circuit provided in the related art, because a Metal-Oxide-semiconductor field effect transistor (MOSFET) in the circuit has a larger parasitic capacitance, the current of the circuit increases slowly during the starting process, so that the starting speed of the subsequent biased circuit is slowed down. Disclosure of Invention In order to solve the problems in the related art, embodiments of the present disclosure provide a current bias circuit, a chip and a corresponding electronic device. In a first aspect, embodiments of the present disclosure provide a current bias circuit, including: The first end of the P-type MOSFET current mirror module is connected with the power supply voltage, the second end of the P-type MOSFET current mirror module is connected with the first bias voltage, the third end of the P-type MOSFET current mirror module is connected with the P-type quick starting module, and the fourth end of the P-type MOSFET current mirror module outputs P-type bias current through the first switch group; The P-type quick starting module is connected to the fifth end of the P-type quick starting module through a first control switch and comprises a plurality of capacitors and a plurality of switches, and the P-type quick starting module is used for accelerating the starting speed of the P-type MOSFET current mirror module through the plurality of capacitors and the plurality of switches; The first end of the N-type MOSFET current mirror module is connected with the grounding end, the second end of the N-type MOSFET current mirror module is connected with the second bias voltage, the third end of the N-type MOSFET current mirror module is connected with the N-type quick starting module, the fourth end of the N-type MOSFET current mirror module outputs N-type bias current through the second switch group, and the fifth end of the N-type MOSFET current mirror module is connected with the sixth end of the P-type MOSFET current mirror module through the second control switch; The N-type quick starting module is connected to the fifth end of the N-type MOSFET current mirror module through the second control switch and comprises a plurality of capacitors and a plurality of switches, and the N-type quick starting module is used for accelerating the starting speed of the N-type MOSFET current mirror module through the capacitors and the switches. In a possible implementation of the present disclosure, the fifth end of the P-type MOSFET current mirror module is further connected to the ground terminal through the first control switch and the first resistor. In one possible implementation manner of the disclosure, the P-type quick start module includes a first capacitor, a second capacitor, a first switch, a second switch, a third switch, a fourth switch, a fifth switch and a sixth switch, wherein: the first end of the first capacitor is connected with the power supply voltage through a third switch, is connected with the third end of the P-type MOSFET current mirror module through a second switch, and is connected with the grounding end through the first switch; The second end of the first capacitor is connected to the ground end through a fourth switch, is connected to the ground end through a fifth switch and a sixth switch, is connected to the first end of the second capacitor through a fifth switch, and is connected to the fifth end of the P-type quick start module through a fifth switch and a first control switch; the second end of the second capacitor is connected to the third end of the P-type MOSFET current mirror module. In one possible implementation manner of the present disclosure, the N-type fast start module includes a third capacitor, a fourth capacitor, a seventh switch, an eighth switch, a ninth switch, a tenth switch, an eleventh switch, and a twelfth switch, where: the first end of the third capacitor is connected with the power supply voltage through a ninth switch, is connected with the fifth end of the N-type MOSFET current mirror module through an eighth switch and is connected with the power supply voltage through a seventh switch; The second end of the third capacitor is connected to the ground end through a tenth switch, is connected to the power supply vol